Ð þíw«8qt(7q<novatech,am335x-lxmti,am33xx&7NovaTech OrionLXmchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000ƒ/ocp/can@481d0000Š/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#”/ocp/usb@47400000/usb-phy@47401300#™/ocp/usb@47400000/usb-phy@47401b00&ž/ocp/ethernet@4a100000/slave@4a100200&¨/ocp/ethernet@4a100000/slave@4a100300memory²memory¾€ cpuscpu@0arm,cortex-a8²cpu¾  ü€›ˆ 'À±(¡ *ˆ28*ˆÓåìcpuø“àpmuarm,cortex-a8-pmusocti,omap-inframpu ti,omap3-mpumpuocp simple-bus'l3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus 'DÀ(wkup_m3@100000ti,am3352-wkup-m3¾@  .umemdmemwkup_m38am335x-pm-firmware.elfG%M%prcm@200000 ti,am3-prcm¾ @clocksclk_32768_ckU fixed-clockb€GMclk_rc32k_ckU fixed-clockb}GMvirt_19200000_ckU fixed-clockb$øG M virt_24000000_ckU fixed-clockbn6G!M!virt_25000000_ckU fixed-clockb}x@G"M"virt_26000000_ckU fixed-clockbŒº€G#M#tclkin_ckU fixed-clockb·GMdpll_core_ckUti,am3-dpll-core-clockå ¾\hGMdpll_core_x2_ckUti,am3-dpll-x2-clockåGMdpll_core_m4_ckUti,divider-clockår¾€}GMdpll_core_m5_ckUti,divider-clockår¾„}GMdpll_core_m6_ckUti,divider-clockår¾Ø}dpll_mpu_ckUti,am3-dpll-clockå ¾ˆ ,GMdpll_mpu_m2_ckUti,divider-clockår¾¨}dpll_ddr_ckUti,am3-dpll-no-gate-clockå ¾”4@GMdpll_ddr_m2_ckUti,divider-clockår¾ }GMdpll_ddr_m2_div2_ckUfixed-factor-clock唟dpll_disp_ckUti,am3-dpll-no-gate-clockå ¾˜HTG M dpll_disp_m2_ckUti,divider-clockå r¾¤}©GMdpll_per_ckU!ti,am3-dpll-no-gate-j-type-clockå ¾ŒpœG M dpll_per_m2_ckUti,divider-clockå r¾¬}G M dpll_per_m2_div4_wkupdm_ckUfixed-factor-clockå ”Ÿdpll_per_m2_div4_ckUfixed-factor-clockå ”Ÿcefuse_fckUti,gate-clockå¼¾ clk_24mhzUfixed-factor-clockå ”ŸG M clkdiv32k_ckUfixed-factor-clockå ”ŸÜG M clkdiv32k_ickUti,gate-clockå ¼¾LGMl3_gclkUfixed-factor-clock唟GMpruss_ocp_gclkU ti,mux-clockå¾0mmu_fckUti,gate-clockå¼¾ timer1_fckU ti,mux-clockå¾(timer2_fckU ti,mux-clock å¾timer3_fckU ti,mux-clock å¾ timer4_fckU ti,mux-clock å¾timer5_fckU ti,mux-clock å¾timer6_fckU ti,mux-clock å¾timer7_fckU ti,mux-clock å¾usbotg_fckUti,gate-clockå ¼¾|dpll_core_m4_div2_ckUfixed-factor-clock唟GMieee5000_fckUti,gate-clockå¼¾äwdt1_fckU ti,mux-clockå¾8l4_rtc_gclkUfixed-factor-clock唟l4hs_gclkUfixed-factor-clock唟l3s_gclkUfixed-factor-clock唟l4fw_gclkUfixed-factor-clock唟l4ls_gclkUfixed-factor-clock唟G$M$sysclk_div_ckUfixed-factor-clock唟cpsw_125mhz_gclkUfixed-factor-clock唟G6M6cpsw_cpts_rft_clkU ti,mux-clockå¾ G7M7gpio0_dbclk_mux_ckU ti,mux-clock å¾<GMgpio0_dbclkUti,gate-clockå¼¾gpio1_dbclkUti,gate-clockå¼¾¬gpio2_dbclkUti,gate-clockå¼¾°gpio3_dbclkUti,gate-clockå¼¾´lcd_gclkU ti,mux-clock å ¾4©GMmmc_clkUfixed-factor-clockå ”Ÿgfx_fclk_clksel_ckU ti,mux-clockå ¼¾,GMgfx_fck_div_ckUti,divider-clockå¾,rsysclkout_pre_ckU ti,mux-clockå ¾GMclkout2_div_ckUti,divider-clockå¼r¾GMdbg_sysclk_ckUti,gate-clockå¼¾GMdbg_clka_ckUti,gate-clockå¼¾GMstm_pmd_clock_mux_ckU ti,mux-clockå¼¾GMtrace_pmd_clk_mux_ckU ti,mux-clockå¼¾GMstm_clk_div_ckUti,divider-clockå¼r@¾Étrace_clk_div_ckUti,divider-clockå¼r@¾Éclkout2_ckUti,gate-clockå¼¾clockdomainsclk_24mhz_clkdmti,clockdomainåscm@210000ti,am3-scmsimple-bus¾!  '! pinmux@800pinctrl-single¾8ß ýpinmux_mmc1_pins0ð0ô0ø0ü000G,M,pinmux_i2c0_pinsˆ(Œ(G*M*cpsw_defaultd' !!$(<!@!D @PTh#l#p#t#x'!G8M8cpsw_sleepd' '''$'('<'@'D'@'P'T'h'l'p't'x''G9M9davinci_mdio_defaultH0LG:M:davinci_mdio_sleepH'L'G;M;pinmux_emmc_pinsP€2„2111 11111G.M.pinmux_uart0_pinsp0tG)M)scm_conf@0syscon¾G0M0clockssys_clkin_ckU ti,mux-clockå !"#¼¾@GMadc_tsc_fckUfixed-factor-clock唟dcan0_fckUfixed-factor-clock唟G/M/dcan1_fckUfixed-factor-clock唟G1M1mcasp0_fckUfixed-factor-clock唟mcasp1_fckUfixed-factor-clock唟smartreflex0_fckUfixed-factor-clock唟smartreflex1_fckUfixed-factor-clock唟sha0_fckUfixed-factor-clock唟aes0_fckUfixed-factor-clock唟rng_fckUfixed-factor-clock唟ehrpwm0_tbclk@44e10664Uti,gate-clockå$¼¾dehrpwm1_tbclk@44e10664Uti,gate-clockå$¼¾dehrpwm2_tbclk@44e10664Uti,gate-clockå$¼¾dwkup_m3_ipc@1324ti,am3352-wkup-m3-ipc¾$$N.%7&'clockdomainsinterrupt-controller@48200000ti,am33xx-intc>S¾H GMedma@49000000 ti,edma3tpcctptc0tptc1tptc2¾IDá@  dG(M(gpio@44e07000ti,omap4-gpiogpio1o>S¾Dàp`gpio@4804c000ti,omap4-gpiogpio2o>S¾HÀbgpio@481ac000ti,omap4-gpiogpio3o>S¾HÀ gpio@481ae000ti,omap4-gpiogpio4o>S¾Hà>serial@44e09000ti,am3352-uartti,omap3-uartuart1bÜl¾Dà H‹okay’((—txrx¡default¯)serial@48022000ti,am3352-uartti,omap3-uartuart2bÜl¾H I ‹disabled’((—txrxserial@48024000ti,am3352-uartti,omap3-uartuart3bÜl¾H@ J ‹disabled’((—txrxserial@481a6000ti,am3352-uartti,omap3-uartuart4bÜl¾H` , ‹disabledserial@481a8000ti,am3352-uartti,omap3-uartuart5bÜl¾H€ - ‹disabledserial@481aa000ti,am3352-uartti,omap3-uartuart6bÜl¾H  . ‹disabledi2c@44e0b000 ti,omap4-i2ci2c1¾Dà°F‹okay¡default¯*b€serial_config1@20 nxp,pca9539¾ serial_config2@21 nxp,pca9539¾!tps@2d ti,tps65910¾-¹+Å+Ñ+Ý+é+õ++ +regulatorsregulator@0¾vrtcregulator@1¾vio /vio_1v5,ddr>ã`Vã`n€regulator@2¾vdd1 /vdd1,mpu> 'ÀVã`n€GMregulator@3¾vdd2/vdd2_1v1,core>ÈàVÈàn€regulator@4¾vdd3regulator@5¾vdig1regulator@6¾vdig2/vdig2_1v8,vdds_pll>w@Vw@n€regulator@7¾vpllregulator@8¾vdac/vdac_1v8,vdds>w@Vw@n€regulator@9¾ vaux1/vaux1_1v8,usb>w@Vw@n€regulator@10¾ vaux2 /vaux2_3v3,io>2Z V2Z n€regulator@11¾ vaux33/vaux33_3v3,usb>2Z V2Z n€regulator@12¾ vmmc /vmmc_3v3,io>2Z V2Z n€regulator@13¾ vbbi2c@4802a000 ti,omap4-i2ci2c2¾H G ‹disabledi2c@4819c000 ti,omap4-i2ci2c3¾HÀ ‹disabledmmc@48060000ti,omap4-hsmmcmmc1”¡¸’((—txrx@&¾H‹okay¡default¯,Õ-ámmc@481d8000ti,omap4-hsmmcmmc2¡’((—txrx&¾H€‹okay¡default¯.Õ-áëmmc@47810000ti,omap4-hsmmcmmc3¡&¾G ‹disabledspinlock@480ca000ti,omap4-hwspinlock¾H   spinlocküwdt@44e35000 ti,omap3-wdt wd_timer2¾DãP[can@481cc000ti,am3352-d_cand_can0¾HÀ å/ìfck  0D4 ‹disabledcan@481d0000ti,am3352-d_cand_can1¾H å1ìfck  0D7 ‹disabledmailbox@480C8000ti,omap4-mailbox¾H €Mmailbox%7G&M&wkup_m3 I TG'M'timer@44e31000ti,am335x-timer-1ms¾DãCtimer1_timer@48040000ti,am335x-timer¾HDtimer2timer@48042000ti,am335x-timer¾H Etimer3timer@48044000ti,am335x-timer¾H@\timer4ntimer@48046000ti,am335x-timer¾H`]timer5ntimer@48048000ti,am335x-timer¾H€^timer6ntimer@4804a000ti,am335x-timer¾H _timer7nrtc@44e3e000ti,am3352-rtcti,da830-rtc¾DãàKLrtcspi@48030000ti,omap4-mcspi¾HA{spi0 ’((((—tx0rx0tx1rx1 ‹disabledspi@481a0000ti,omap4-mcspi¾H}{spi1 ’(*(+(,(-—tx0rx0tx1rx1 ‹disabledusb@47400000ti,am33xx-usb¾G@' usb_otg_hs‹okaycontrol@44e10620ti,am335x-usb-ctrl-module¾Dá DáH.phy_ctrlwakeup‹okayG2M2usb-phy@47401300ti,am335x-usb-phy¾G@.phy‹okay‰2G3M3usb@47401000ti,musb-am33xx‹okay¾G@G@ .mccontrol•mc¥host­¿Î Þôë3h’4444444444 4 4 4 4 44444444444 4 4 4 4 4„—rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phy¾G@.phy‹okay‰2G5M5usb@47401800ti,musb-am33xx‹okay¾G@G@ .mccontrol•mc¥host­¿Î Þôë5h’444444444444444444444444444444„—rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 ¾G@G@ G@0G@@@#.gluecontrollerschedulerqueuemgr•gluedðþ‹okayG4M4epwmss@48300000ti,am33xx-pwmss¾H0epwmss0 ‹disabled$'H0H0€H0€H0€€H0H0€ecap@48300100ti,am33xx-ecap ¾H0€•ecap0ecap0 ‹disabledehrpwm@48300200ti,am33xx-ehrpwm ¾H0€ehrpwm0 ‹disabledepwmss@48302000ti,am33xx-pwmss¾H0 epwmss1 ‹disabled$'H0!H0!€H0!€H0!€€H0"H0"€ecap@48302100ti,am33xx-ecap ¾H0!€/•ecap1ecap1 ‹disabledehrpwm@48302200ti,am33xx-ehrpwm ¾H0"€ehrpwm1 ‹disabledepwmss@48304000ti,am33xx-pwmss¾H0@epwmss2 ‹disabled$'H0AH0A€H0A€H0A€€H0BH0B€ecap@48304100ti,am33xx-ecap ¾H0A€=•ecap2ecap2 ‹disabledehrpwm@48304200ti,am33xx-ehrpwm ¾H0B€ehrpwm2 ‹disabledethernet@4a100000ti,am335x-cpswti,cpswcpgmac0å67 ìfckcpts&2 >H@Q ]dq€¾JJ&()*+'’0‹okay¡defaultsleep¯8™9£mdio@4a101000ti,davinci_mdio davinci_mdio­B@¾J‹okay¡defaultsleep¯:™;G<M<slave@4a100200¶Â<ÉrmiiÒslave@4a100300¶Â<ÉrmiiÒcpsw-phy-sel@44e10650ti,am3352-cpsw-phy-sel¾DáP .gmii-selåocmcram@40300000 mmio-sram¾@0elm@48080000ti,am3352-elm¾H elm ‹disabledlcdc@4830e000ti,am33xx-tilcdc¾H0à&$lcdc ‹disabledtscadc@44e0d000ti,am3359-tscadc¾DàÐ&adc_tsc ‹disabledtscti,am3359-tscadcôti,am3359-adcgpmc@50000000ti,am3352-gpmcgpmc¾P d% ‹disabledsham@53100000ti,omap4-shamsham¾Sm’($—rx‹okayaes@53500000 ti,omap4-aesaes¾SP g’((—txrx‹okaymcasp@48038000ti,am33xx-mcasp-audiomcasp0¾H€ F@.mpudatPQ•txrx ‹disabled’(( —txrxmcasp@4803C000ti,am33xx-mcasp-audiomcasp1¾HÀ F@@.mpudatRS•txrx ‹disabled’( ( —txrxrng@48310000 ti,omap4-rngrng¾H1 ofixedregulator@0regulator-fixed/vbat>LK@VLK@nG+M+fixedregulator@1regulator-fixed /vmmcsd_fixed>2Z V2Z nG-M- #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-pointsvoltage-toleranceclocksclock-namesclock-latencycpu0-supplyinterruptsti,hwmodsrangesreg-namesti,pm-firmwarelinux,phandle#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-twopinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,rprocmboxesinterrupt-controller#interrupt-cells#dma-cellsgpio-controller#gpio-cellsstatusdmasdma-namespinctrl-namespinctrl-0vcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-widthti,non-removable#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csti,ctrl_modinterrupt-namesdr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftsysconpinctrl-1dual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlanrmii-clock-ext#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpins