X8S(SFreescale i.MX7 SabreSD Board!fsl,imx7d-sdbfsl,imx7dchosenaliases%,/soc/aips-bus@30000000/gpio@30200000%2/soc/aips-bus@30000000/gpio@30210000%8/soc/aips-bus@30000000/gpio@30220000%>/soc/aips-bus@30000000/gpio@30230000%D/soc/aips-bus@30000000/gpio@30240000%J/soc/aips-bus@30000000/gpio@30250000%P/soc/aips-bus@30000000/gpio@30260000$V/soc/aips-bus@30800000/i2c@30a20000$[/soc/aips-bus@30800000/i2c@30a30000$`/soc/aips-bus@30800000/i2c@30a40000$e/soc/aips-bus@30800000/i2c@30a50000&j/soc/aips-bus@30800000/usdhc@30b40000&o/soc/aips-bus@30800000/usdhc@30b50000&t/soc/aips-bus@30800000/usdhc@30b60000'y/soc/aips-bus@30800000/serial@30860000'/soc/aips-bus@30800000/serial@30890000'/soc/aips-bus@30800000/serial@30880000'/soc/aips-bus@30800000/serial@30a60000'/soc/aips-bus@30800000/serial@30a70000'/soc/aips-bus@30800000/serial@30a80000'/soc/aips-bus@30800000/serial@30a90000memorymemorycpuscpu@0!arm,cortex-a7cpu2g8 l >?&armarm_root_srcpll_armpll_sys_maincpu@1!arm,cortex-a7cpuinterrupt-controller@31001000!arm,cortex-a7-gic  11 1@ 1` clock-cki !fixed-clock2?Ockilclock-osc !fixed-clock2?n6Ooscetr@30086000 !arm,coresight-tmcarm,primecell0`J apb_pclkportendpointbmtpiu@30087000!!arm,coresight-tpiuarm,primecell0pJ apb_pclkportendpointbmreplicator!arm,coresight-replicatorportsport@0endpointmport@1endpointmport@2endpointbmetf@30084000 !arm,coresight-tmcarm,primecell0@J apb_pclkportsport@0endpointbm  port@1endpointmfunnel@30083000#!arm,coresight-funnelarm,primecell00J apb_pclkportsport@0endpointbm   port@1endpointbport@2endpointm funnel@30041000#!arm,coresight-funnelarm,primecell0J apb_pclkportsport@0endpointbm port@1endpointbm port@2endpointm   etm@3007c000"!arm,coresight-etm3xarm,primecell0}J apb_pclkportendpointm  etm@3007d000"!arm,coresight-etm3xarm,primecell0 V}J apb_pclkportendpointm  soc !simple-busaips-bus@30000000!fsl,aips-bussimple-bus0@gpio@30200000!fsl,imx7d-gpiofsl,imx35-gpio0 @A ..gpio@30210000!fsl,imx7d-gpiofsl,imx35-gpio0!BC gpio@30220000!fsl,imx7d-gpiofsl,imx35-gpio0"DE gpio@30230000!fsl,imx7d-gpiofsl,imx35-gpio0#FG //gpio@30240000!fsl,imx7d-gpiofsl,imx35-gpio0$HI &&gpio@30250000!fsl,imx7d-gpiofsl,imx35-gpio0%JK gpio@30260000!fsl,imx7d-gpiofsl,imx35-gpio0&LM wdog@30280000!fsl,imx7d-wdtfsl,imx21-wdt0( NBwdog@30290000!fsl,imx7d-wdtfsl,imx21-wdt0) O disabledwdog@302a0000!fsl,imx7d-wdtfsl,imx21-wdt0*   disabledwdog@302b0000!fsl,imx7d-wdtfsl,imx21-wdt0+ m disablediomuxc-lpsr@302c0000!fsl,imx7d-iomuxc-lpsr0,gpt@302d0000!fsl,imx7d-gptfsl,imx6sx-gpt0- 7.ipgpergpt@302e0000!fsl,imx7d-gptfsl,imx6sx-gpt0. 62ipgper disabledgpt@302f0000!fsl,imx7d-gptfsl,imx6sx-gpt0/ 56ipgper disabledgpt@30300000!fsl,imx7d-gptfsl,imx6sx-gpt00 4:ipgper disablediomuxc@30330000!fsl,imx7d-iomuxc03defaultimx7d-sdbenet1grpPth xXDHLPT@,048<**enet2grp  xtx|,,hoggrp0D4i2c1grp0L@H@i2c2grp0T@P@i2c3grp0\@X@i2c4grp0@@uart1grp0,y(yuart5grp`typyxy |yuart6grp`lyhytypyusdhc1grpY YYYYYYY%%usdhc2grp,Y(0Y4Y8Y<Y|Yusdhc2grp_100mhz,Z(0Z4Z8Z<Zusdhc2grp_200mhz,[(0[4[8[<[usdhc3grpDY@HYLYPYTYXY\Y`YdYh''usdhc3grp_100mhzDZ@HZLZPZTZXZ\Z`ZdZh((usdhc3grp_200mhzD[@H[L[P[T[X[\[`[d[h))iomuxc-gpr@30340000!fsl,imx7d-iomuxc-gprsyscon04ocotp-ctrl@30350000!syscon05 disabledanatop@303600004!fsl,imx7d-anatopfsl,imx6q-anatopsysconsimple-bus0613regulator-vdd1p0d@210!fsl,anatop-regulator vdd1p0d 54OL^s 5Osnvs@30370000#!fsl,sec-v4.0-monsysconsimple-mfd07snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lpW4snvs-poweroff!syscon-poweroffW8`snvs-powerkey!fsl,sec-v4.0-pwrkey tccm@30380000!fsl,imx7d-ccm08UV2 ckiloscsrc@30390000#!fsl,imx7d-srcfsl,imx51-srcsyscon09 Yaips-bus@30400000!fsl,aips-bussimple-bus0@@pwm@30660000!fsl,imx7d-pwmfsl,imx27-pwm0f Qipgper disabledpwm@30670000!fsl,imx7d-pwmfsl,imx27-pwm0g Ripgper disabledpwm@30680000!fsl,imx7d-pwmfsl,imx27-pwm0h Sipgper disabledpwm@30690000!fsl,imx7d-pwmfsl,imx27-pwm0i Tipgper disabledaips-bus@30800000!fsl,aips-bussimple-bus0@serial@30860000!fsl,imx7d-uartfsl,imx6q-uart0 ipgperokaydefault# serial@30890000!fsl,imx7d-uartfsl,imx6q-uart0 ipgper disabledserial@30880000!fsl,imx7d-uartfsl,imx6q-uart0 ipgper disabledi2c@30a20000!fsl,imx7d-i2cfsl,imx21-i2c0 #okaydefaultpfuze3000@08!fsl,pfuze3000regulatorssw1a `4:L`jsw1b `4:L`jsw2`4::Lsw3 4-P:LswbstLK@4N0vsnvsB@4-:Lvrefddr:Lvldo1w@42ZLvldo2 54vccsd+|42ZLv33+|42ZLvldo3w@42ZLvldo4w@42ZLi2c@30a30000!fsl,imx7d-i2cfsl,imx21-i2c0 $okaydefaulti2c@30a40000!fsl,imx7d-i2cfsl,imx21-i2c0 %okaydefaulti2c@30a50000!fsl,imx7d-i2cfsl,imx21-i2c0 &okaydefaultwm8960@1a !wlf,wm8960Jmclkuserial@30a60000!fsl,imx7d-uartfsl,imx6q-uart0 ipgper disabledserial@30a70000!fsl,imx7d-uartfsl,imx6q-uart0 ipgper disabledserial@30a80000!fsl,imx7d-uartfsl,imx6q-uart0 ipgper disabledserial@30a90000!fsl,imx7d-uartfsl,imx6q-uart0 ~ipgper disabledusb@30b10000!fsl,imx7d-usbfsl,imx27-usb0 +okayusb@30b20000!fsl,imx7d-usbfsl,imx27-usb0 * !okay"hostusb@30b30000!fsl,imx7d-usbfsl,imx27-usb0 (#$hsichost disabledusbmisc@30b10200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc0usbmisc@30b20200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc0!!usbmisc@30b30200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc0$$usbphynop1!usb-nop-xceiv main_clkusbphynop2!usb-nop-xceiv main_clk  usbphynop3!usb-nop-xceivn main_clk##usdhc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc0  ipgahbperokaydefault% & & usdhc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc0  ipgahbper disabledusdhc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc0  ipgahbperokay"defaultstate_100mhzstate_200mhz'!(+)5ׄJZethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fec0$vwx(RR*"ipgahbptpenet_clk_refenet_outhzokaydefault*#+5rgmii+mdioethernet-phy@0++ethernet-phy@1--ethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fec0$def(RR*"ipgahbptpenet_clk_refenet_outhzokaydefault,#+5rgmii-regulators !simple-busregulator@0!regulator-fixed usb_otg1_vbusLK@4LK@ .regulator@1!regulator-fixed usb_otg2_vbusLK@4LK@ /""regulator@2!regulator-fixed  can2-3v32Z42Z .regulator@3!regulator-fixed  vref-1v8w@4w@ #address-cells#size-cellsmodelcompatiblegpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6device_typeregoperating-pointsclock-latencyclocksclock-namesarm-supplylinux,phandle#interrupt-cellsinterrupt-controller#clock-cellsclock-frequencyclock-output-namesslave-moderemote-endpointcpuarm,primecell-periphidinterrupt-parentrangesinterruptsgpio-controller#gpio-cellsstatusfsl,input-selpinctrl-namespinctrl-0fsl,pinsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitregmapmasklinux,keycodewakeup-source#reset-cells#pwm-cellsassigned-clocksassigned-clock-parentsregulator-boot-onregulator-always-onregulator-ramp-delaywlf,shared-lrclkfsl,usbphyfsl,usbmiscphy-clkgate-delay-usvbus-supplydr_modephy_type#index-cellsbus-widthcd-gpioswp-gpiosenable-sdio-wakeupkeep-power-in-suspendpinctrl-1pinctrl-2assigned-clock-ratesfsl,tuning-stepnon-removablefsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetgpioenable-active-high