Ð þí583X(83 sirf,prima2sirf,prima2-cb&!7CSR SiRFprimaII Evaluation Boardchosenaliasesmemory=memoryI cpuscpu@0arm,cortex-a9=cpuIM _ q€~€‹ž¬¼  à @£è€£è !À 5ÈàÔIðarm-pmuarm,cortex-a9-pmuâaxi simple-bus í@@€l2-cache-controller@80040000arm,pl310-cacheI€â; ô @interrupt-controller@80020000'8sirf,prima2-intcI€MSsys-iobg simple-bus 툈clock-controller@88000000sirf,prima2-clkcIˆâ[MSreset-controller@88010000sirf,prima2-rstcIˆhMSrsc-controller@88020000sirf,prima2-rscIˆcphifbg@88030000sirf,prima2-cphifbgIˆ¼*mem-iobg simple-bus ímemory-controller@90000000sirf,prima2-memcI â¼memc-monitorsirf,prima2-memcmonI â¼ disp-iobg simple-bus ídisplay@90010000sirf,prima2-lcdIâvpp@90020000sirf,prima2-vppIâ¼#ugraphics-iobg simple-bus 혘graphics@98000000powervr,sgx531I˜â¼ multimedia-iobg simple-bus í  multimedia@a0000000sirf,prima2-video-codecI â¼!dsp-iobg simple-bus í¨¨dspif@a8000000sirf,prima2-dspifI¨â ugps@a8010000sirf,prima2-gpsI¨â¼ udsp@a9000000sirf,prima2-dspI©â¼uperi-iobg simple-busí°°VV°timer@b0020000sirf,prima2-tickI°â¼ nand@b0030000sirf,prima2-nandI°â)¼audio@b0040000sirf,prima2-audioI°â#¼uart@b0050000|sirf,prima2-uartI°â‡€¼ •rxtxuart@b0060000|sirf,prima2-uartI°â‡ ¼Ÿdefault­uart@b0070000|sirf,prima2-uartI°â‡€¼•rxtxusp@b0080000|sirf,prima2-uspI°â‡€¼•rxtxusp@b0090000|sirf,prima2-uspI° ⇀¼•rxtxusp@b00a0000|sirf,prima2-uspI° ⇀¼  •rxtxdma-controller@b00b0000|sirf,prima2-dmacI° â ¼·MSdma-controller@b0160000|sirf,prima2-dmacI°â ¼·MSvip@b00C0000sirf,prima2-vipI° ¼âÂspi@b00d0000|sirf,prima2-spiI° âÚ •rxtx¼ ódisabledŸdefault­spi@b0170000|sirf,prima2-spiI°âÚ  •rxtx¼ ódisabledŸdefault­i2c@b00e0000|sirf,prima2-i2cI°â¼i2c@b00f0000|sirf,prima2-i2cI°â¼tsc@b0110000sirf,prima2-tscI°â!¼pinctrl@b0120000ú'sirf,prima2-pinctrlI°â+,-./8lcd0@0lcdlcd_16bitsgrp  lcd_16bitslcd0@1lcdlcd_18bitsgrp  lcd_18bitslcd0@2lcdlcd_24bitsgrp  lcd_24bitslcdrom0@0lcd lcdromgrp lcdromuart0@0uart uart0grp uart0uart0@1uartuart0_nostreamctrlgrp uart0_nostreamctrluart1@0MSuart uart1grp uart1uart2@0uart uart2grp uart2uart2@1uartuart2_nostreamctrlgrp uart2_nostreamctrlspi0@0MSspispi0grp spi0spi1@0MSspispi1grp spi1i2c0@0i2ci2c0grp i2c0i2c1@0i2ci2c1grp i2c1pwm0@0pwmpwm0grp pwm0pwm1@0pwmpwm1grp pwm1pwm2@0pwmpwm2grp pwm2pwm3@0pwmpwm3grp pwm3gps@0gpsgpsgrp gpsvip@0vipvipgrp vipsdmmc0@0sdmmc0 sdmmc0grp sdmmc0sdmmc1@0sdmmc1 sdmmc1grp sdmmc1sdmmc2@0sdmmc2 sdmmc2grp sdmmc2sdmmc3@0sdmmc3 sdmmc3grp sdmmc3sdmmc4@0sdmmc4 sdmmc4grp sdmmc4sdmmc5@0sdmmc5 sdmmc5grp sdmmc5i2s_mclk@0i2s_mclk i2smclkgrp  i2s_mclki2s_ext_clk_input@0i2s_ext_clk_inputi2s_ext_clk_inputgrp i2s_ext_clk_inputi2s@0i2si2sgrp i2si2s_no_din@0i2s_no_dini2s_no_dingrp  i2s_no_dini2s_6chn@0i2s_6chn i2s_6chngrp  i2s_6chnac97@0ac97ac97grp ac97nand@0nandnandgrp nandusp0@0usp0usp0grp usp0usp0@1usp0usp0_uart_nostreamctrl_grp usp0_uart_nostreamctrlusp0@2usp0usp0_only_utfs_grp usp0_only_utfsusp0@3usp0usp0_only_urfs_grp usp0_only_urfsusp1@0usp1usp1grp usp1usp1@1usp1usp1_uart_nostreamctrl_grp usp1_uart_nostreamctrlusp2@0usp2usp2grp usp2usp2@1usp2usp2_uart_nostreamctrl_grp usp2_uart_nostreamctrlusb0_utmi_drvbus@0usb0_utmi_drvbususb0_utmi_drvbusgrp usb0_utmi_drvbususb1_utmi_drvbus@0usb1_utmi_drvbususb1_utmi_drvbusgrp usb1_utmi_drvbususb1_dp_dn@0usb1_dp_dnusb1_dp_dngrp  usb1_dp_dnuart1_route_io_usb1@0uart1_route_io_usb1uart1_route_io_usb1grp uart1_route_io_usb1warm_rst@0warm_rst warm_rstgrp  warm_rstpulse_count@0pulse_countpulse_countgrp  pulse_countcko0@0cko0cko0grp cko0cko1@0cko1cko1grp cko1pwm@b0130000sirf,prima2-pwmI°¼efusesys@b0140000sirf,prima2-efuseI°¼pulsec@b0150000sirf,prima2-pulsecI°â0¼pci-iobgsirf,prima2-pciiobgsimple-bus íVV°sdhci@56000000|sirf,prima2-sdhcIVâ& ódisabled.¼$sdhci@56100000|sirf,prima2-sdhcIVâ& ódisabled.¼$sdhci@56200000|sirf,prima2-sdhcIV â ódisabled¼%sdhci@56300000|sirf,prima2-sdhcIV0â ódisabled¼%sdhci@56400000|sirf,prima2-sdhcIV@â' ódisabled¼&sdhci@56500000|sirf,prima2-sdhcIVPâ'¼&pci-copy@57900000sirf,prima2-pcicpIWâ(rom-interface@57a00000sirf,prima2-romifIW rtc-iobg7sirf,prima2-rtciobgsirf-prima2-rtciobg-bussimple-busI€gpsrtc@1000sirf,prima2-gpsrtcI â789sysrtc@2000sirf,prima2-sysrtcI  â456minigpsrtc@2000sirf,prima2-minigpsrtcI â6pwrc@3000sirf,prima2-pwrcI0â uus-iobg simple-bus í¸¸usb@b00e0000chipidea,ci13611a-prima2I¸â ¼(usb@b00f0000chipidea,ci13611a-prima2I¸â ¼)sata@b00f0000synopsys,dwc-ahsataI¸â%security@b00f0000sirf,prima2-securityI¸â*¼ #address-cells#size-cellscompatibleinterrupt-parentmodeldevice_typeregd-cache-line-sizei-cache-line-sized-cache-sizei-cache-sizetimebase-frequencybus-frequencyclock-frequencyclocksoperating-pointsclock-latencyinterruptsrangesarm,tag-latencyarm,data-latencyarm,filter-ranges#interrupt-cellsinterrupt-controllerlinux,phandle#clock-cells#reset-cellsresetscell-indexfifosizedmasdma-namespinctrl-namespinctrl-0#dma-cellssirf,vip-dma-rx-channelsirf,spi-num-chipselectsstatus#gpio-cellsgpio-controllersirf,pinssirf,functionbus-width