Z8Uh(U0(,chipspark,rayeager-px2rockchip,rk3066a 7Rayeager PX2chosenaliases=/i2c@2002d000B/i2c@2002f000G/i2c@20056000L/i2c@2005a000Q/i2c@2005e000V/dwmmc@1021c000\/dwmmc@10214000b/dwmmc@10218000h/serial@10124000p/serial@10126000x/serial@20064000/serial@20068000/spi@20070000/spi@20074000memorymemory`@amba ,arm,amba-busdma-controller@20018000,arm,pl330arm,primecell @ apb_pclk@@dma-controller@2001c000,arm,pl330arm,primecell @ apb_pclk disableddma-controller@20078000,arm,pl330arm,primecell @ apb_pclk44oscillator ,fixed-clockn6xin24ml2-cache-controller@10138000,arm,pl310-cache%==scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer   local-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gic1Fserial@10124000,snps,dw-apb-uart@ "Wabaudclkapb_pclk@Lokayndefault |serial@10126000,snps,dw-apb-uart` #Wabaudclkapb_pclkAM disabledndefault|usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@  usb2-phyokayusb@101c0000 ,snps,dwc2 otghost usb2-phyokayndefault| ethernet@10204000,rockchip,rk3066-emac @<  D hclkmacrefdrmiiokayndefault | ethernet-phy@0dwmmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciuokayndefault|&0<Ndwmmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciuokayndefault |_i&0dwmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciuokay_<i&ndefault |0wpmu@20004000,rockchip,rk3066-pmusyscon @grf@20008000,syscon   i2c@2002d000,rockchip,rk3066-i2c  ( i2cPokayndefault|ak8963@0d,asahi-kasei,ak8975 ndefault| mma8452@1d ,fsl,mma8452ndefault|!i2c@2002f000,rockchip,rk3066-i2c  ) Qi2cokayndefault|"tps@2d-#ndefault|$%&&&&''&& ,ti,tps65910regulatorsregulator@0vcc_rtcvrtcregulator@1vcc_io2Z52Zvio''regulator@2vdd_arm '5`Mvdd1>>regulator@3vcc_ddr '5`Mvdd2regulator@5vcc18w@5w@vdig1regulator@6vdd_115vdig2regulator@7vcc_25&%5&%vpll33regulator@8 vccio_wlw@5w@vdacregulator@9 vcc25_hdmi&%5&% vaux1regulator@10vcca_332Z52Z vaux2regulator@11 vcc_rmii2Z52Z vaux33regulator@12 vcc28_cif*5* vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm _F disabledndefault|(pwm@20030010,rockchip,rk2928-pwm _Fokayndefault|)watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3okaypwm@20050020,rockchip,rk2928-pwm  _Gokayndefault|*pwm@20050030,rockchip,rk2928-pwm 0_G disabledndefault|+i2c@20056000,rockchip,rk3066-i2c ` * Ri2cokayndefault|,i2c@2005a000,rockchip,rk3066-i2c  + Si2cokayndefault|-i2c@2005e000,rockchip,rk3066-i2c  4 Ti2cokayndefault|.serial@20064000,snps,dw-apb-uart @ $Wabaudclkapb_pclkBNokayndefault|/serial@20068000,snps,dw-apb-uart  %Wabaudclkapb_pclkCOokayndefault |012saradc@2006c000,rockchip,saradc  jGJsaradcapb_pclkokay|3spi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk & 4 4 txrxokayndefault|5678spi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @4 4 txrx disabledndefault|9:;<cpusrockchip,rk3066-smpcpu@0cpu,arm,cortex-a9=(ag8 s 'B@@>cpu@1cpu,arm,cortex-a9=sram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPi2s@10118000,rockchip,rk3066-i2s  ndefault|?@@txrxi2s_hclki2s_clkK disabledi2s@1011a000,rockchip,rk3066-i2s  ndefault|A@@txrxi2s_hclki2s_clkL disabledi2s@1011c000,rockchip,rk3066-i2s  ndefault|B@ @ txrxi2s_hclki2s_clkM disabledclock-controller@20000000,rockchip,rk3066a-cru  timer@2000e000,snps,dw-apb-timer-osc  .VD timerpclktimer@20038000,snps,dw-apb-timer-osc  ,TB timerpclktimer@2003a000,snps,dw-apb-timer-osc  -UC timerpclkphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phy okayusb-phy0|Qphyclkusb-phy1Rphyclkpinctrl,rockchip,rk3066a-pinctrl gpio0@20034000,rockchip,gpio-bank @ 6U 1FLLgpio1@2003c000,rockchip,gpio-bank  7V 1Fgpio2@2003e000,rockchip,gpio-bank  8W 1Fgpio3@20080000,rockchip,gpio-bank  9X 1FJJgpio4@20084000,rockchip,gpio-bank @ :Y 1Fgpio6@2000a000,rockchip,gpio-bank  <Z 1F##pcfg_pull_defaultEEpcfg_pull_none+CCemacemac-xfer8CCCCCCCC  emac-mdio 8CC  rmii-rst8Demmcemmc-clk8Eemmc-cmd8 Eemmc-rst8 Ei2c0i2c0-xfer 8CCi2c1i2c1-xfer 8CC""i2c2i2c2-xfer 8CC,,i2c3i2c3-xfer 8CC--i2c4i2c4-xfer 8CC..pwm0pwm0-out8C((pwm1pwm1-out8C))pwm2pwm2-out8C**pwm3pwm3-out8C++spi0spi0-clk8E55spi0-cs08E88spi0-tx8E66spi0-rx8E77spi0-cs18Espi1spi1-clk8E99spi1-cs08E<<spi1-rx8E;;spi1-tx8E::spi1-cs18Euart0uart0-xfer 8EEuart0-cts8Euart0-rts8Euart1uart1-xfer 8EEuart1-cts8Euart1-rts8Euart2uart2-xfer 8E E//uart3uart3-xfer 8EE00uart3-cts8E11uart3-rts8E22sd0sd0-clk8Esd0-cmd8 Esd0-cd8Esd0-wp8Esd0-bus-width18 Esd0-bus-width4@8 E E E Esd1sd1-clk8Esd1-cmd8Esd1-cd8Esd1-wp8Esd1-bus-width18Esd1-bus-width4@8EEEEi2s0i2s0-bus8EE E E E E EEE??i2s1i2s1-bus`8EEEEEEAAi2s2i2s2-bus`8EEEEEEBBpcfg-output-highFDDak8963comp-int8E  irir-int8EFFkeyspwr-key8EGGmma8452gsensor-int8E!!mmcsdmmc-pwr8EKKusb_hosthost-drv8EMMhub-rst8D  sata-pwr8EHHsata-reset8 D  usb_otgotg-drv8ENNtpspmic-int8E$$pwr-hold8D%%ir-receiver,gpio-ir-receiver R#ndefault|Fgpio-keys ,gpio-keysbutton@0X R# hGPIO Powerntndefault|Gvsys-regulator,regulator-fixedvsysLK@5LK@M&&5v-stdby-regulator,regulator-fixed 5v_stdbyLK@5LK@MIIemmc-regulator,regulator-fixed emmc_vccq-5-y&sata-regulator,regulator-fixed ndefault|Husb_5vLK@5LK@yIsdmmc-regulator,regulator-fixed Jndefault|Kvcc_sd2Z52Zy'usb-host-regulator,regulator-fixed Lndefault|M host-pwrLK@5LK@yIusb-otg-regulator,regulator-fixed Lndefault|Nvcc_otgLK@5LK@yI #address-cells#size-cellsinterrupt-parentcompatiblemodeli2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1device_typeregrangesinterrupts#dma-cellsclocksclock-nameslinux,phandlestatusclock-frequency#clock-cellsclock-output-namescache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaphysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyfifo-depthbus-widthdisable-wpnum-slotsvmmc-supplycap-mmc-highspeedcap-sd-highspeedbroken-cdnon-removablevqmmc-supplyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsvref-supplydmasdma-namesenable-methodnext-level-cacheoperating-pointsclock-latencycpu0-supply#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsoutput-highgpiosgpio-key,wakeuplabellinux,codevin-supplyenable-active-highgpiostartup-delay-us