y8s4(r,rockchip,rk3288-evb-act8846rockchip,rk3288&chosenaliases7/i2c@ff650000Ui2c"M4defaultB# adisabledi2c@ff150000rockchip,rk3288-i2c ?Ui2c"O4defaultB$ adisabledi2c@ff160000rockchip,rk3288-i2c @Ui2c"P4defaultB% adisabledi2c@ff170000rockchip,rk3288-i2c AUi2c"Q4defaultB&aokay5H;Hserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7"MUUbaudclkapb_pclk4defaultB'aokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8"NVUbaudclkapb_pclk4defaultB(aokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9"OWUbaudclkapb_pclk4defaultB)aokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :"PXUbaudclkapb_pclk4defaultB*aokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;"QYUbaudclkapb_pclk4defaultB+aokaythermal-zonesreserve_thermal,cpu_thermal,tripscpu_alert0ppassive5-;-cpu_crit_ criticalcooling-mapsmap0- gpu_thermal,tripsgpu_alert0ppassive5.;.gpu_crit_ criticalcooling-mapsmap0. tsadc@ff280000rockchip,rk3288-tsadc( %"HZUtsadcapb_pclk tsadc-apb4initdefaultsleepB/ 0*/4Jsaokayax5,;,ethernet@ff290000rockchip,rk3288-gmac) macirq18"fgc]MUstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth adisabledusb@ff500000 generic-ehciP "Uusbhost2usbaokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T "Uotghost3 usb2-phyaokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X "Uotgotg@@ 4 usb2-phy adisabledusb@ff5c0000 generic-ehci\ "Uusbhost adisabledi2c@ff650000rockchip,rk3288-i2ce <Ui2c"L4defaultB5aokayhsyr827@40silergy,syr827@vdd_cpu- PEp]q65;syr828@41silergy,syr828Avdd_gpu- PEp]6hym8563@51haoyu,hym8563Q&74defaultB8xxin32kact8846@5aactive-semi,act8846Zaokay666696:regulatorsREG1VCC_DDR-OEO]REG2VCC_IO-2ZE2Z]59;9REG3VDD_LOG-B@EB@]REG4VCC_20-E]5:;:REG5 VCCIO_SD-2ZE2Z]5;REG6 VDD10_LCD-B@EB@]REG7 VCCA_CODEC-2ZE2Z]REG8VCCA_TP-2ZE2Z]REG9 VCCIO_PMU-2ZE2Z]REG10VDD_10-B@EB@]REG11VCC_18-w@Ew@]REG12 VCC18_LCD-w@Ew@]i2c@ff660000rockchip,rk3288-i2cf =Ui2c"N4defaultB; adisabledpwm@ff680000rockchip,rk3288-pwmh4defaultB<"^Upwmaokay5R;Rpwm@ff680010rockchip,rk3288-pwmh4defaultB="^Upwm adisabledpwm@ff680020rockchip,rk3288-pwmh 4defaultB>"^Upwm adisabledpwm@ff680030rockchip,rk3288-pwmh04defaultB?"^Upwm adisabledbus_intmem@ff700000 mmio-sramp Cpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds5;power-controller!rockchip,rk3288-power-controller5C;Cpd_vio "chgfdehilkjpd_hevc "oppd_video "pd_gpu "syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv1H jk$#gׄeрxhрxh5;syscon@ff770000rockchip,rk3288-grfsysconw51;1watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt"p Oaokaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/ Uhclkmclk"T@tx U4defaultBA1 adisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s U@@txrxUi2s_hclki2s_clk"R4defaultBB adisabledvop@ff930000rockchip,rk3288-vop "Uaclk_vopdclk_vophclk_vop@C def axiahbdclkNDaokayport5 ; endpoint@0UE5I;Iiommu@ff930300rockchip,iommu  vopb_mmu@C eaokay5D;Dvop@ff940000rockchip,rk3288-vop "Uaclk_vopdclk_vophclk_vop@C  axiahbdclkNFaokayport5 ; endpoint@0UG5J;Jiommu@ff940300rockchip,iommu  vopl_mmu@C eaokay5F;Fhdmi@ff980000rockchip,rk3288-dw-hdmi1 g"hm Uiahbisfr@C aokayrHportsportendpoint@0UI5E;Eendpoint@1UJ5G;Ginterrupt-controller@ffc01000 arm,gic-400~  @ `   5;phyrockchip,rk3288-usb-phy1aokayusb-phy0 "]Uphyclk54;4usb-phy14"^Uphyclk52;2usb-phy2H"_Uphyclk53;3pinctrlrockchip,rk3288-pinctrl1Cgpio0@ff750000rockchip,gpio-banku Q"@~57;7gpio1@ff780000rockchip,gpio-bankx R"A~gpio2@ff790000rockchip,gpio-banky S"B~gpio3@ff7a0000rockchip,gpio-bankz T"C~gpio4@ff7b0000rockchip,gpio-bank{ U"D~gpio5@ff7c0000rockchip,gpio-bank| V"E~gpio6@ff7d0000rockchip,gpio-bank} W"F~gpio7@ff7e0000rockchip,gpio-bank~ X"G~5P;Pgpio8@ff7f0000rockchip,gpio-bank Y"H~hdmihdmi-ddc KKpcfg-pull-up5L;Lpcfg-pull-downpcfg-pull-none5K;Kpcfg-pull-none-12ma 5O;Osleepglobal-pwroffKddrio-pwroffKddr0-retentionLddr1-retentionLi2c0i2c0-xfer KK55;5i2c1i2c1-xfer KK5#;#i2c2i2c2-xfer  K K5;;;i2c3i2c3-xfer KK5$;$i2c4i2c4-xfer KK5%;%i2c5i2c5-xfer KK5&;&i2s0i2s0-bus`KKKKKK5B;Bsdmmcsdmmc-clkM5 ; sdmmc-cmdN5 ; sdmcc-cdL5;sdmmc-bus1Lsdmmc-bus4@NNNN5;sdmmc-pwr K5V;Vsdio0sdio0-bus1Lsdio0-bus4@LLLLsdio0-cmdLsdio0-clkKsdio0-cdLsdio0-wpLsdio0-pwrLsdio0-bkpwrLsdio0-intLsdio1sdio1-bus1Lsdio1-bus4@LLLLsdio1-cdLsdio1-wpLsdio1-bkpwrLsdio1-intLsdio1-cmdLsdio1-clkKsdio1-pwr Lemmcemmc-clkK5;emmc-cmdL5;emmc-pwr L5;emmc-bus1Lemmc-bus4@LLLLemmc-bus8LLLLLLLL5;spi0spi0-clk L5;spi0-cs0 L5;spi0-txL5;spi0-rxL5;spi0-cs1Lspi1spi1-clk L5;spi1-cs0 L5;spi1-rxL5;spi1-txL5;spi2spi2-cs1Lspi2-clkL5;spi2-cs0L5";"spi2-rxL5!;!spi2-tx L5 ; uart0uart0-xfer LK5';'uart0-ctsLuart0-rtsKuart1uart1-xfer L K5(;(uart1-cts Luart1-rts Kuart2uart2-xfer LK5);)uart3uart3-xfer LK5*;*uart3-cts Luart3-rts Kuart4uart4-xfer  L K5+;+uart4-ctsLuart4-rtsKtsadcotp-gpio K5/;/otp-out K50;0pwm0pwm0-pinK5<;<pwm1pwm1-pinK5=;=pwm2pwm2-pinK5>;>pwm3pwm3-pinK5?;?gmacrgmii-pinsKKKKOOOOKKK OOKKrmii-pinsKKKKKKKKKKspdifspdif-tx K5A;Apcfg-pull-none-drv-8ma5M;Mpcfg-pull-up-drv-8ma5N;Nbacklightbl-enK5Q;QbuttonspwrbtnL5S;Spmicpmic-intL58;8usbhost-vbus-drvK5T;Teth_phyeth-phy-pwrK5U;Ubacklightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~# <P4defaultBQIRB@gpio-keys gpio-keysN4defaultBSbutton@0 C7YtdGPIO Key Powerj{dvcc-host-regulatorregulator-fixed 74defaultBT vcc_host]qvcc-phy-regulatorregulator-fixed 74defaultBUvcc_phy-2ZE2Z]qvsys-regulatorregulator-fixedvcc_sys-LK@ELK@]q56;6sdmmc-regulatorregulator-fixed P 4defaultBVvcc_sd-2ZE2Z95; #address-cells#size-cellscompatibleinterrupt-parenti2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplybroken-cdnon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cells#reset-cellsassigned-clocksassigned-clock-rates#sound-dai-cellspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthbrightness-levelsdefault-brightness-levelenable-gpiospwmsautorepeatlinux,codelabellinux,input-typegpio-key,wakeupdebounce-intervalenable-active-highgpiostartup-delay-us