8w(w*rockchip,rk3288-evb-rk808rockchip,rk3288&chosenaliases7/i2c@ff650000Ui2c"M4defaultB# adisabledi2c@ff150000rockchip,rk3288-i2c ?Ui2c"O4defaultB$ adisabledi2c@ff160000rockchip,rk3288-i2c @Ui2c"P4defaultB% adisabledi2c@ff170000rockchip,rk3288-i2c AUi2c"Q4defaultB&aokay5N;Nserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7"MUUbaudclkapb_pclk4defaultB'aokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8"NVUbaudclkapb_pclk4defaultB(aokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9"OWUbaudclkapb_pclk4defaultB)aokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :"PXUbaudclkapb_pclk4defaultB*aokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;"QYUbaudclkapb_pclk4defaultB+aokaythermal-zonesreserve_thermal,cpu_thermal,tripscpu_alert0ppassive5-;-cpu_crit_ criticalcooling-mapsmap0- gpu_thermal,tripsgpu_alert0ppassive5.;.gpu_crit_ criticalcooling-mapsmap0. tsadc@ff280000rockchip,rk3288-tsadc( %"HZUtsadcapb_pclk tsadc-apb4initdefaultsleepB/ 0*/4Jsaokayax5,;,ethernet@ff290000rockchip,rk3288-gmac) macirq18"fgc]MUstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethaok2rgmiiinput 3 'B@ 44defaultB530<usb@ff500000 generic-ehciP "UusbhostE6Jusbaokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T "UotgThostE7 Jusb2-phyaokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X "UotgTotg\n}@@ E8 Jusb2-phy adisabledusb@ff5c0000 generic-ehci\ "Uusbhost adisabledi2c@ff650000rockchip,rk3288-i2ce <Ui2c"L4defaultB9aokayhpmic@1brockchip,rk808&:4defaultB;<xxin32krk808-clkout2====== >?%?2=??L@regulatorsDCDC_REG1Ym qpvdd_arm5;regulator-state-memDCDC_REG2Ym Pvdd_gpuregulator-state-memB@DCDC_REG3Ymvcc_ddrregulator-state-memDCDC_REG4Ym2Z2Zvcc_io5?;?regulator-state-mem2ZLDO_REG1Ym2Z2Z vccio_pmu5@;@regulator-state-mem2ZLDO_REG2Ym2Z2Zvcc_tpregulator-state-memLDO_REG3YmB@B@vdd_10regulator-state-memB@LDO_REG4Ymw@w@ vcc18_lcdregulator-state-memw@LDO_REG5Ymw@2Z vccio_sd5;regulator-state-mem2ZLDO_REG6YmB@B@ vdd10_lcdregulator-state-memB@LDO_REG7Ymw@w@vcc_185>;>regulator-state-memw@LDO_REG8Ym2Z2Z vcca_codecregulator-state-mem2ZSWITCH_REG1Ymvcc_wlregulator-state-memSWITCH_REG2Ymvcc_lcdregulator-state-memi2c@ff660000rockchip,rk3288-i2cf =Ui2c"N4defaultBA adisabledpwm@ff680000rockchip,rk3288-pwmh 4defaultBB"^Upwmaokay5X;Xpwm@ff680010rockchip,rk3288-pwmh 4defaultBC"^Upwm adisabledpwm@ff680020rockchip,rk3288-pwmh  4defaultBD"^Upwm adisabledpwm@ff680030rockchip,rk3288-pwmh0 4defaultBE"^Upwm adisabledbus_intmem@ff700000 mmio-sramp Cpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds5;power-controller!rockchip,rk3288-power-controller5I;Ipd_vio "chgfdehilkjpd_hevc "oppd_video "pd_gpu "syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv1*H jk$7#gׄeрxhрxh5;syscon@ff770000rockchip,rk3288-grfsysconw51;1watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt"p Oaokaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifL Uhclkmclk"TFtx U4defaultBG1 adisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s UFFtxrxUi2s_hclki2s_clk"R4defaultBH adisabledvop@ff930000rockchip,rk3288-vop "Uaclk_vopdclk_vophclk_vop]I def axiahbdclkkJaokayport5 ; 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sdmmc-cmdT5 ; sdmcc-cdR5;sdmmc-bus1Rsdmmc-bus4@TTTT5;sdmmc-pwr Q5\;\sdio0sdio0-bus1Rsdio0-bus4@RRRRsdio0-cmdRsdio0-clkQsdio0-cdRsdio0-wpRsdio0-pwrRsdio0-bkpwrRsdio0-intRsdio1sdio1-bus1Rsdio1-bus4@RRRRsdio1-cdRsdio1-wpRsdio1-bkpwrRsdio1-intRsdio1-cmdRsdio1-clkQsdio1-pwr Remmcemmc-clkQ5;emmc-cmdR5;emmc-pwr R5;emmc-bus1Remmc-bus4@RRRRemmc-bus8RRRRRRRR5;spi0spi0-clk R5;spi0-cs0 R5;spi0-txR5;spi0-rxR5;spi0-cs1Rspi1spi1-clk R5;spi1-cs0 R5;spi1-rxR5;spi1-txR5;spi2spi2-cs1Rspi2-clkR5;spi2-cs0R5";"spi2-rxR5!;!spi2-tx R5 ; uart0uart0-xfer RQ5';'uart0-ctsRuart0-rtsQuart1uart1-xfer R Q5(;(uart1-cts Ruart1-rts Quart2uart2-xfer RQ5);)uart3uart3-xfer RQ5*;*uart3-cts Ruart3-rts Quart4uart4-xfer  R Q5+;+uart4-ctsRuart4-rtsQtsadcotp-gpio Q5/;/otp-out Q50;0pwm0pwm0-pinQ5B;Bpwm1pwm1-pinQ5C;Cpwm2pwm2-pinQ5D;Dpwm3pwm3-pinQ5E;Egmacrgmii-pinsQQQQUUUUQQQ UUQQ55;5rmii-pinsQQQQQQQQQQspdifspdif-tx Q5G;Gpcfg-pull-none-drv-8ma5S;Spcfg-pull-up-drv-8ma5T;Tbacklightbl-enQ5W;WbuttonspwrbtnR5Y;Ypmicpmic-intR5;;;usbhost-vbus-drvQ5Z;Zeth_phyeth-phy-pwrQ5[;[backlightpwm-backlight.  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~@ YV4defaultBWfXB@gpio-keys gpio-keysk4defaultBYbutton@0 `:vtGPIO Key Powerdvcc-host-regulatorregulator-fixed :4defaultBZ vcc_hostYmvcc-phy-regulatorregulator-fixed :4defaultB[vcc_phy2Z2ZYm52;2vsys-regulatorregulator-fixedvcc_sysLK@LK@Ym5=;=sdmmc-regulatorregulator-fixed V 4defaultB\vcc_sd2Z2Z?5;external-gmac-clock fixed-clockhsY@ xext_gmac54;4 #address-cells#size-cellscompatibleinterrupt-parenti2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplybroken-cdnon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmarockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#sound-dai-cellspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthbrightness-levelsdefault-brightness-levelenable-gpiospwmsautorepeatlinux,codelabellinux,input-typegpio-key,wakeupdebounce-intervalenable-active-highstartup-delay-usvin-supply