8z(z|'firefly,firefly-rk3288rockchip,rk3288&7Firefly-RK3288chosenaliases=/i2c@ff650000B/i2c@ff140000G/i2c@ff660000L/i2c@ff150000Q/i2c@ff160000V/i2c@ff170000[/dwmmc@ff0f0000a/dwmmc@ff0c0000g/dwmmc@ff0d0000m/dwmmc@ff0e0000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0  @(/;Acpu@501cpuarm,cortex-a12;Acpu@502cpuarm,cortex-a12;Acpu@503cpuarm,cortex-a12;Aamba arm,amba-busIdma-controller@ff250000arm,pl330arm,primecell%@P( [apb_pclk;Adma-controller@ff600000arm,pl330arm,primecell`@P( [apb_pclk gdisableddma-controller@ffb20000arm,pl330arm,primecell@P( [apb_pclk;RARreserved-memoryIdma-unusable@fe000000oscillator fixed-clocknn6~xin24m; A timerarm,armv7-timer0   nn6timer@ff810000rockchip,rk3288-timer  H ( a [timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр (Drv[biuciuciu-driveciu-sample  @gokay%0:defaultH R^dwmmc@ff0d0000rockchip,rk3288-dw-mshcр (Esw[biuciuciu-driveciu-sample ! @gokayk%u0:default HR^dwmmc@ff0e0000rockchip,rk3288-dw-mshcр (Ftx[biuciuciu-driveciu-sample "@ gdisableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр (Guy[biuciuciu-driveciu-sample #@gokayk%u0:defaultHR^saradc@ff100000rockchip,saradc $(I[[saradcapb_pclkgokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi(AR[spiclkapb_pclk  txrx ,:defaultH !"gokayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi(BS[spiclkapb_pclk txrx -:defaultH#$%& gdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi(CT[spiclkapb_pclktxrx .:defaultH'()* gdisabledi2c@ff140000rockchip,rk3288-i2c >[i2c(M:defaultH+gokayi2c@ff150000rockchip,rk3288-i2c ?[i2c(O:defaultH, gdisabledi2c@ff160000rockchip,rk3288-i2c @[i2c(P:defaultH-gokayi2c@ff170000rockchip,rk3288-i2c A[i2c(Q:defaultH.gokay;ZAZserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7(MU[baudclkapb_pclk:default H/01gokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8(NV[baudclkapb_pclk:defaultH2gokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9(OW[baudclkapb_pclk:defaultH3gokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :(PX[baudclkapb_pclk:defaultH4gokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;(QY[baudclkapb_pclk:defaultH5 gdisabledthermal-zonesreserve_thermal6cpu_thermal6tripscpu_alert0ppassive;7A7cpu_crit_ criticalcooling-mapsmap07 gpu_thermal6tripsgpu_alert0ppassive;8A8gpu_crit_ criticalcooling-mapsmap08 tsadc@ff280000rockchip,rk3288-tsadc( %(HZ[tsadcapb_pclk &tsadc-apb:initdefaultsleepH92:<9F\sgokays;6A6ethernet@ff290000rockchip,rk3288-gmac) macirq;8(fgc]M[stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB &stmmacethgok<input:defaultH=>?@Argmii   'B@ 5BE0Nusb@ff500000 generic-ehciP ([usbhostWC\usb gdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ([otgfhostWD \usb2-phygokay:defaultHEusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ([otgfotgn@@ WF \usb2-phygokayusb@ff5c0000 generic-ehci\ ([usbhost gdisabledi2c@ff650000rockchip,rk3288-i2ce <[i2c(L:defaultHGgokaynsyr827@40silergy,syr827@vdd_cpu Pp*,F@[;Asyr828@41silergy,syr828Avdd_gpu Pp[hym8563@51haoyu,hym8563Qn~xin32k&H:defaultHIact8846@5aactive-semi,act8846Z:defaultHJKf~LregulatorsREG1vcc_ddrOOREG2vcc_io2Z2Z;AREG3vdd_logREG4vcc_20;LALREG5 vccio_sd2Z2Z;AREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2Z;cAcREG9vcc_lan2Z2Z;AAAREG10vdd_10B@B@REG11vcc_18w@w@;AREG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf =[i2c(N:defaultHMgokaypwm@ff680000rockchip,rk3288-pwmh:defaultHN(^[pwm gdisabledpwm@ff680010rockchip,rk3288-pwmh:defaultHO(^[pwmgokaypwm@ff680020rockchip,rk3288-pwmh :defaultHP(^[pwm gdisabledpwm@ff680030rockchip,rk3288-pwmh0:defaultHQ(^[pwm gdisabledbus_intmem@ff700000 mmio-sramp Ipsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds;Apower-controller!rockchip,rk3288-power-controller;UAUpd_vio (chgfdehilkjpd_hevc (oppd_video (pd_gpu (syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv;Hjk$#gׄeрxhрxh;Asyscon@ff770000rockchip,rk3288-grfsysconw;;A;watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt(p Ogokaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif [hclkmclk(TRtx U:defaultHS; gdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s URRtxrx[i2s_hclki2s_clk(R:defaultHT gdisabledvop@ff930000rockchip,rk3288-vop ([aclk_vopdclk_vophclk_vop U def &axiahbdclk.Vgokayport; A endpoint@05W;[A[iommu@ff930300rockchip,iommu  vopb_mmu U Egokay;VAVvop@ff940000rockchip,rk3288-vop ([aclk_vopdclk_vophclk_vop U  &axiahbdclk.Xgokayport; A endpoint@05Y;\A\iommu@ff940300rockchip,iommu  vopl_mmu U Egokay;XAXhdmi@ff980000rockchip,rk3288-dw-hdmi; g(hm [iahbisfr U gokayRZportsportendpoint@05[;WAWendpoint@15\;YAYinterrupt-controller@ffc01000 arm,gic-400^s  @ `   ;Aphyrockchip,rk3288-usb-phy;gokayusb-phy0 (][phyclk;FAFusb-phy14(^[phyclk;CACusb-phy2H(_[phyclk;DADpinctrlrockchip,rk3288-pinctrl;Igpio0@ff750000rockchip,gpio-banku Q(@^s;fAfgpio1@ff780000rockchip,gpio-bankx R(A^sgpio2@ff790000rockchip,gpio-banky S(B^sgpio3@ff7a0000rockchip,gpio-bankz T(C^sgpio4@ff7b0000rockchip,gpio-bank{ U(D^s;BABgpio5@ff7c0000rockchip,gpio-bank| V(E^sgpio6@ff7d0000rockchip,gpio-bank} W(F^sgpio7@ff7e0000rockchip,gpio-bank~ X(G^s;HAHgpio8@ff7f0000rockchip,gpio-bank Y(H^s;hAhhdmihdmi-ddc ]]pcfg-pull-up;^A^pcfg-pull-downpcfg-pull-none;]A]pcfg-pull-none-12ma ;_A_sleepglobal-pwroff]ddrio-pwroff]ddr0-retention^ddr1-retention^i2c0i2c0-xfer ]];GAGi2c1i2c1-xfer ]];+A+i2c2i2c2-xfer  ] ];MAMi2c3i2c3-xfer ]];,A,i2c4i2c4-xfer ]];-A-i2c5i2c5-xfer ]];.A.i2s0i2s0-bus`]]]]]];TATsdmmcsdmmc-clk]; A sdmmc-cmd^; A sdmcc-cd^;Asdmmc-bus1^sdmmc-bus4@^^^^;Asdmmc-pwr ];kAksdio0sdio0-bus1^sdio0-bus4@^^^^;Asdio0-cmd^;Asdio0-clk];Asdio0-cd^sdio0-wp^sdio0-pwr^sdio0-bkpwr^sdio0-int^sdio1sdio1-bus1^sdio1-bus4@^^^^sdio1-cd^sdio1-wp^sdio1-bkpwr^sdio1-int^sdio1-cmd^sdio1-clk]sdio1-pwr ^emmcemmc-clk];Aemmc-cmd^;Aemmc-pwr ^;Aemmc-bus1^emmc-bus4@^^^^emmc-bus8^^^^^^^^;Aspi0spi0-clk ^;Aspi0-cs0 ^;Aspi0-tx^; A spi0-rx^;!A!spi0-cs1^;"A"spi1spi1-clk ^;#A#spi1-cs0 ^;&A&spi1-rx^;%A%spi1-tx^;$A$spi2spi2-cs1^spi2-clk^;'A'spi2-cs0^;*A*spi2-rx^;)A)spi2-tx ^;(A(uart0uart0-xfer ^];/A/uart0-cts^;0A0uart0-rts];1A1uart1uart1-xfer ^ ];2A2uart1-cts ^uart1-rts ]uart2uart2-xfer ^];3A3uart3uart3-xfer ^];4A4uart3-cts ^uart3-rts ]uart4uart4-xfer  ^ ];5A5uart4-cts^uart4-rts]tsadcotp-gpio ];9A9otp-out ];:A:pwm0pwm0-pin];NANpwm1pwm1-pin];OAOpwm2pwm2-pin];PAPpwm3pwm3-pin];QAQgmacrgmii-pins]]]]____]]] __]];=A=rmii-pins]]]]]]]]]]phy-int ^;@A@phy-pmeb^;?A?phy-rst`;>A>spdifspdif-tx ];SASpcfg-output-high;`A`pcfg-output-low;aAaact8846pwr-hold`;KAKpmic-vsela;JAJdvpdvp-pwr ];oAohym8563rtc-int^;IAIkeyspwr-key^;gAgledspower-led];jAjwork-led];iAiusb_hosthost-vbus-drv];lAlusbhub-rst`;EAEusb_otgotg-vbus-drv ];nAnirir-int^;eAedovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@[b;dAdexternal-gmac-clock fixed-clocknsY@ ~ext_gmac;<A<io-domains"rockchip,rk3288-io-voltage-domain;cd*8AFTdp~ir-receivergpio-ir-receiver:defaultHe Hgpio-keys gpio-keysbutton@0 f GPIO Powert:defaultHgleds gpio-ledswork hfirefly:blue:user rc-feedback:defaultHipower hfirefly:green:power default-on:defaultHjvsys-regulatorregulator-fixedvcc_sysLK@LK@;Asdmmc-regulatorregulator-fixed @H :defaultHkvcc_sd2Z2Z[;Aflash-regulatorregulator-fixed vcc_flashw@w@[;Ausb-regulatorregulator-fixedvcc_5vLK@LK@[;mAmusb-host-regulatorregulator-fixed @f:defaultHl vcc_host_5vLK@LK@[musb-otg-regulatorregulator-fixed @f :defaultHn vcc_otg_5vLK@LK@[mvcc28-dvp-regulatorregulator-fixed @f :defaultHo vcc28_dvp**[;bAb #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplybroken-cdnon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#sound-dai-cellspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supplygpiosgpio-key,wakeuplabellinux,codelinux,default-triggerstartup-delay-usenable-active-high