8(STiH416 B2020!st,stih416-b2020st,stih416cpuscpu@0,cpu!arm,cortex-a98cpu@1,cpu!arm,cortex-a98interrupt-controller@fffe1000!arm,cortex-a9-gic<M8bhscu@fffe0000!arm,cortex-a9-scu8timer@fffe0200p!arm,cortex-a9-global-timer8  clocksclk-sysin !fixed-clockÀbhclockgen-a@fee620008 Hclk-s-a0-pll!st,clkgena-plls-c650clk-s-a0-pll0-hsclk-s-a0-pll0-lsclk-s-a0-pll1bhclk-s-a0-osc-prediv(!st,clkgena-prediv-c65st,clkgena-predivclk-s-a0-osc-predivbhclk-s-a0-hs+!st,clkgena-divmux-c65-hsst,clkgena-divmuxclk-s-fdma-0clk-s-fdma-1clk-s-a0-ls+!st,clkgena-divmux-c65-lsst,clkgena-divmux_clk-s-icn-reg-0clk-s-icn-if-0clk-s-icn-reg-lp-0clk-s-emissclk-s-eth1-phyclk-s-mii-ref-outb4h4clockgen-a@fee810008 Hclk-s-a1-pll!st,clkgena-plls-c650clk-s-a1-pll0-hsclk-s-a1-pll0-lsclk-s-a1-pll1bhclk-s-a1-osc-prediv(!st,clkgena-prediv-c65st,clkgena-predivclk-s-a1-osc-predivbhclk-s-a1-hs+!st,clkgena-divmux-c65-hsst,clkgena-divmux#clk-s-stac-phyclk-s-vtac-tx-phyclk-s-a1-ls+!st,clkgena-divmux-c65-lsst,clkgena-divmuxclk-s-icn-if-2clk-s-card-mmc-0clk-s-icn-if-1clk-s-gmac0-phyclk-s-nand-ctrlclk-s-mii0-ref-outclk-s-stac-sysclk-s-card-mmc-1b>h>clockgen-a@fde120008 Pclk-m-a0-pll0%!st,plls-c32-a1x-0st,clkgen-plls-c32Lclk-m-a0-pll0-phi0clk-m-a0-pll0-phi1clk-m-a0-pll0-phi2clk-m-a0-pll0-phi3b h clk-m-a0-pll1%!st,plls-c32-a1x-1st,clkgen-plls-c32Lclk-m-a0-pll1-phi0clk-m-a0-pll1-phi1clk-m-a0-pll1-phi2clk-m-a0-pll1-phi3b h clk-m-a0-osc-prediv(!st,clkgena-prediv-c32st,clkgena-predivclk-m-a0-osc-predivbhclk-m-a0-div0-!st,clkgena-divmux-c32-odf0st,clkgena-divmux Mclk-m-fdma-12clk-m-pp-dmu-0clk-m-pp-dmu-1clk-m-icm-lmiclk-m-vid-dmu-0clk-m-a0-div1-!st,clkgena-divmux-c32-odf1st,clkgena-divmux  rclk-m-vid-dmu-1clk-m-a9-ext2fclk-m-st40rtclk-m-st231-dmu-0clk-m-st231-dmu-1clk-m-st231-audclk-m-st231-gp-0bhclk-m-a0-div2-!st,clkgena-divmux-c32-odf2st,clkgena-divmux  clk-m-st231-gp-1clk-m-icn-cpuclk-m-icn-stacclk-m-tx-icn-dmu-0clk-m-tx-icn-dmu-1clk-m-tx-icn-tsclk-m-icn-vdp-0clk-m-icn-vdp-1clk-m-a0-div3-!st,clkgena-divmux-c32-odf3st,clkgena-divmux  3clk-m-icn-vp8clk-m-icn-reg-11clk-m-a9-traceclockgen-a@fd6db0008m Pclk-m-a1-pll0%!st,plls-c32-a1x-0st,clkgen-plls-c32Lclk-m-a1-pll0-phi0clk-m-a1-pll0-phi1clk-m-a1-pll0-phi2clk-m-a1-pll0-phi3b h clk-m-a1-pll1%!st,plls-c32-a1x-1st,clkgen-plls-c32Lclk-m-a1-pll1-phi0clk-m-a1-pll1-phi1clk-m-a1-pll1-phi2clk-m-a1-pll1-phi3b h clk-m-a1-osc-prediv(!st,clkgena-prediv-c32st,clkgena-predivclk-m-a1-osc-predivb h clk-m-a1-div0-!st,clkgena-divmux-c32-odf0st,clkgena-divmux hclk-m-fdma-10clk-m-fdma-11clk-m-hva-altclk-m-proc-scclk-m-tpclk-m-rx-icn-dmu-0clk-m-rx-icn-dmu-1bhclk-m-a1-div1-!st,clkgena-divmux-c32-odf1st,clkgena-divmux  hclk-m-rx-icn-tsclk-m-rx-icn-vdp-0clk-m-prv-t1-busclk-m-icn-reg-12clk-m-icn-reg-10clk-m-icn-st231clk-m-a1-div2-!st,clkgena-divmux-c32-odf2st,clkgena-divmux  Kclk-m-fvdp-proc-altclk-m-icn-reg-13clk-m-tx-icn-gpuclk-m-rx-icn-gpubhclk-m-a1-div3-!st,clkgena-divmux-c32-odf3st,clkgena-divmux  clk-m-a9-ext2f-div2!fixed-factor-clockbhclockgen-a@fd34500084P Pclk-m-a2-pll0%!st,plls-c32-a1x-0st,clkgen-plls-c32Lclk-m-a2-pll0-phi0clk-m-a2-pll0-phi1clk-m-a2-pll0-phi2clk-m-a2-pll0-phi3bhclk-m-a2-pll1%!st,plls-c32-a1x-1st,clkgen-plls-c32Lclk-m-a2-pll1-phi0clk-m-a2-pll1-phi1clk-m-a2-pll1-phi2clk-m-a2-pll1-phi3bhclk-m-a2-osc-prediv(!st,clkgena-prediv-c32st,clkgena-predivclk-m-a2-osc-predivbhclk-m-a2-div0-!st,clkgena-divmux-c32-odf0st,clkgena-divmuxIclk-m-vtac-main-phyclk-m-vtac-aux-phyclk-m-stac-phyclk-m-stac-sysclk-m-a2-div1-!st,clkgena-divmux-c32-odf1st,clkgena-divmux_clk-m-compo-mainclk-m-compo-auxclk-m-bdisp-0clk-m-bdisp-1clk-m-icn-bdispclk-m-icn-compoclk-m-a2-div2-!st,clkgena-divmux-c32-odf2st,clkgena-divmuxRclk-m-icn-vdp-2clk-m-icn-reg-14clk-m-mdtpclk-m-jpegdecclk-m-dcephy-impctrlclk-m-a2-div3-!st,clkgena-divmux-c32-odf3st,clkgena-divmuxclockgen-a9@fdde08b08pclockgen-a9-pll*!st,stih416-plls-c32-a9st,clkgen-plls-c32clockgen-a9-pll-odfbhclk-m-a9@fdde08ac'!st,stih416-clkgen-a9-muxst,clkgen-mux8bhclk-m-a9-periphs!fixed-factor-clockbhclockgen-b0@fee108b4!st,stih416-quadfs216st,quadfs8D:clk-s-usb48clk-s-dssclk-s-stfe-frc-2clk-s-thsens-scardbIhIclockgen-b1@fe8308c4!st,stih416-quadfs216st,quadfs8D0clk-s-pcm-0clk-s-pcm-1clk-s-pcm-2clk-s-pcm-3clockgen-c@fe8307d0!st,stih416-quadfs432st,quadfs8D/clk-s-c-fs0-ch0clk-s-c-vcc-sdclk-s-c-fs0-ch2bhclk-s-vcc-hd@fe8308b8(!st,stih416-clkgenc-vcc-hdst,clkgen-mux8 bhclk-s-tmds-fromphy !fixed-clockbhclockgen-c-vcc@fe8308ac!!st,stih416-clkgencst,clkgen-vcc8 clk-s-pix-hdmiclk-s-pix-dvoclk-s-out-dvoclk-s-pix-hdclk-s-hddacclk-s-dencclk-s-sddacclk-s-pix-mainclk-s-pix-auxclk-s-stfe-frc-0clk-s-ref-mcruclk-s-slave-mcruclk-s-tmds-hdmiclk-s-hdmi-reject-pllclk-s-thsensbhclockgen-d@fee107e0!st,stih416-quadfs216st,quadfs8D5clk-s-ccscclk-s-stfe-frc-1clk-s-tsout-1clk-s-mchiclockgen-e@fd3208bc!!st,stih416-quadfs660-Est,quadfs82@clk-m-pix-mdtp-0clk-m-pix-mdtp-1clk-m-pix-mdtp-2clk-m-mpelpcbDhDclockgen-f@fd320878!!st,stih416-quadfs660-Fst,quadfs82xAclk-m-main-vidfsclk-m-hva-fsclk-m-fvdp-vcpuclk-m-fvdp-proc-fsbhclk-m-fvdp-proc@fd320910*!st,stih416-clkgenf-vcc-fvdpst,clkgen-mux82 clk-m-hva@fd690868)!st,stih416-clkgenf-vcc-hvast,clkgen-mux8ihclk-m-f-vcc-hd@fd32086c(!st,stih416-clkgenf-vcc-hdst,clkgen-mux82lbhclk-m-f-vcc-sd@fd32086c(!st,stih416-clkgenf-vcc-sdst,clkgen-mux82lbhclk-m-pix-hdmirx-sas !fixed-clockbhclockgen-f-vcc@fd32086c!!st,stih416-clkgenfst,clkgen-vcc82l clk-m-pix-main-pipeclk-m-pix-aux-pipeclk-m-pix-main-cruclk-m-pix-aux-cruclk-m-xfer-be-compoclk-m-xfer-pip-compoclk-m-xfer-aux-compoclk-m-vsensclk-m-pix-hdmirx-0clk-m-pix-hdmirx-1clockgen-ddr@0xfdde07d88clockgen-ddr-pll+!st,stih416-plls-c32-ddrst,clkgen-plls-c32clockgen-ddr0clockgen-ddr1clockgen-gpu@fd68ff008h clockgen-gpu-pll,!st,stih416-gpu-pll-c32st,clkgengpu-pll-c32clockgen-gpu-pllaliases&/soc/pin-controller-sbc/gpio@fe610000&/soc/pin-controller-sbc/gpio@fe611000&/soc/pin-controller-sbc/gpio@fe612000&/soc/pin-controller-sbc/gpio@fe613000&/soc/pin-controller-sbc/gpio@fe614000&/soc/pin-controller-sbc/gpio@fe615000(/soc/pin-controller-front/gpio@fee00000( /soc/pin-controller-front/gpio@fee01000(/soc/pin-controller-front/gpio@fee02000(/soc/pin-controller-front/gpio@fee03000(/soc/pin-controller-front/gpio@fee04000("/soc/pin-controller-front/gpio@fee05000()/soc/pin-controller-front/gpio@fee06000(0/soc/pin-controller-front/gpio@fee07000(7/soc/pin-controller-front/gpio@fee08000(>/soc/pin-controller-front/gpio@fee09000'E/soc/pin-controller-rear/gpio@fe820000'L/soc/pin-controller-rear/gpio@fe821000'S/soc/pin-controller-rear/gpio@fe822000'Z/soc/pin-controller-rear/gpio@fe823000'a/soc/pin-controller-rear/gpio@fe824000'h/soc/pin-controller-rear/gpio@fe825000*o/soc/pin-controller-fvdp-fe/gpio@fd6b0000*v/soc/pin-controller-fvdp-fe/gpio@fd6b1000*}/soc/pin-controller-fvdp-fe/gpio@fd6b2000,/soc/pin-controller-fvdp-lite/gpio@fd330000,/soc/pin-controller-fvdp-lite/gpio@fd331000,/soc/pin-controller-fvdp-lite/gpio@fd332000,/soc/pin-controller-fvdp-lite/gpio@fd333000,/soc/pin-controller-fvdp-lite/gpio@fd334000/soc/serial@fe531000/soc/dwmac@fef08000socp !simple-buspin-controller-sbc!st,stih416-sbc-pinctrl8airqmux irqmux a`gpio@fe610000M<8PIO0b"h"gpio@fe611000M<8PIO1b#h#gpio@fe612000M<8 PIO2b!h!gpio@fe613000M<80PIO3b%h%gpio@fe614000M<8@PIO4b h gpio@fe615000M<8PPIO40b$h$rcir0b@h@st,pins sbc_serial1sbc_serial1b7h7st,pins!!keyscankeyscanbBhBst,pins!"("/"6!=#E#M"U!sbc_i2c0sbc_i2c0-defaultb:h:st,pins]  a  usbusb3bMhMst,pinse$o$sbc_i2c1sbc_i2c1-defaultb;h;st,pins]% a% gmac1mii1st,pinsz""""""""########!!!!rgmii1-0b?h?st,pinsz""""""######!!!%pwm1pwm1-0-defaultbRhRst,pins%pwm1-1-defaultst,pins pwm1-2-defaultbShSst,pins pwm1-3-defaultbThTst,pins pin-controller-front!st,stih416-front-pinctrl&8irqmux irqmux gpio@fee00000M<8PIO5gpio@fee01000M<8PIO6gpio@fee02000M<8 PIO7gpio@fee03000M<80PIO8gpio@fee04000M<8@PIO9b'h'gpio@fee05000M<8PPIO10gpio@fee06000M<8`PIO11b(h(gpio@fee07000M<8pPIO12b)h)gpio@fee08000M<8PIO30gpio@fee09000M<8PIO31pwm0pwm0-0-defaultbNhNst,pins'serial2-oeserial2-1b6h6st,pins(i2c0i2c0-defaultb8h8st,pins]' a' usbusb0bHhHst,pinse'o'i2c1i2c1-defaultb9h9st,pins]) a) fsmfsmbAhAst,pins) ))")/);)pin-controller-rear!st,stih416-rear-pinctrl*8irqmux irqmux `gpio@fe820000M<8PIO13b,h,gpio@fe821000M<8PIO14b-h-gpio@fe822000M<8 PIO15b.h.gpio@fe823000M<80PIO16b/h/gpio@fe824000M<8@PIO17b+h+gpio@fe825000M<8PPIO18b0h0serial2serial2-0b5h5st,pins++gmac0mii0b=h=st,pins,,z----......////..+,gmii0st,pinsrgmii0st,pins,,z----....////++mmc0mmc0bEhEst,pinsF,M-S-Y-_-e.C.i/o/u/{/+++mmc1mmc1bFhFst,pinsF.M,S-Y-_-e.i.o.u/{//,usbusb1bKhKst,pinse0o0usb2bLhLst,pinse0o0pwm0pwm0-1-defaultbOhOst,pins,pwm0-2-defaultbPhPst,pins.pwm0-3-defaultbQhQst,pins+pin-controller-fvdp-fe!st,stih416-fvdp-fe-pinctrl18kirqmux qirqmux k0gpio@fd6b0000M<8PIO100gpio@fd6b1000M<8PIO101gpio@fd6b2000M<8 PIO102pin-controller-fvdp-lite!st,stih416-fvdp-lite-pinctrl283irqmux rirqmux 3Pgpio@fd330000M<8PIO103gpio@fd331000M<8PIO104gpio@fd332000M<8 PIO105gpio@fd333000M<80PIO106gpio@fd334000M<8@PIO107restart!st,stih416-restartokaypowerdown-controller!st,stih416-powerdownbChCsoftreset-controller!st,stih416-softresetb<h<sbc-syscfg@fe600000!st,stih416-sbc-syscfgsyscon8`bhfront-syscfg@fee10000!st,stih416-front-syscfgsyscon8b&h&rear-syscfg@fe830000!st,stih416-rear-syscfgsyscon8b*h*fvdp-fe-syscfg@fddf0000!!st,stih416-fvdp-fe-syscfgsyscon8b1h1fvdp-lite-syscfg@fd6a0000#!st,stih416-fvdp-lite-syscfgsyscon8jb2h2cpu-syscfg@fdde0000!st,stih416-cpu-syscfgsyscon8b3h3compo-syscfg@fd320000!st,stih416-compo-syscfgsyscon82transport-syscfg@fd690000#!st,stih416-transport-syscfgsyscon8ilpm-syscfg@fe4b5100!st,stih416-lpm-syscfgsyscon8KQirq-syscfg!st,stih416-irq-syscfg3serial@fed32000!st,asc disabled8 , 4default56serial@fe531000!st,ascokay8S, default7i2c@fed40000!st,comms-ssc4-i2c8 4sscdefault8okayi2c@fed41000!st,comms-ssc4-i2c8 4sscdefault9okayi2c@fe540000!st,comms-ssc4-i2c8T sscdefault:okayi2c@fe541000!st,comms-ssc4-i2c8T sscdefault;okaydwmac@fe810000,network-!st,stih416-dwmacsnps,dwmacsnps,dwmac-3.710 disabled8 stmmaceth$macirqeth_wake_irqeth_lpi &7*A< Hstmmacethdefault=stmmacethsti-ethclk>>dwmac@fef08000,network-!st,stih416-dwmacsnps,dwmacsnps,dwmac-3.710okay8 stmmaceth$macirqeth_wake_irqeth_lpi &7A< Hstmmacethdefault?stmmacethsti-ethclk44 Trgmii-id]gclk_125x% ''rc@fe518000 !st,comms-irb8Q4  infrareddefault@A<spifsm@fe902000 !st,spi-fsm8 A* Xokaypartition@0 SerialFlash18Ppartition@500000 SerialFlash28Pkeyscan@fe4b0000!st,sti-keyscan disabled8K  defaultBAC<temp0!st,stih416-sas-thermalthermalokaytemp1@fdfe8000!st,stih416-mpe-thermal8Dthermal okaysdhci@fe81e000 !st,sdhciokay8 mmcirqdefaultEmmc>sdhci@fe81f000 !st,sdhciokay8 mmcirqdefaultFmmc>phy@fe382000!st,miphy365x-phy *$(port@fe38200088 9@ satapcie bGhGport@fe38a00088@ satapciesata@fe380000 !st,sti-ahci88 hostc)G .sata-phyAC<Hpwr-dwnsw-rst ahci_clk4okayphy@0!st,stih416-usb-phy*osc_phybJhJusb@fe1ffe00!st,st-ehci-300x8 defaultH>I icclk48)J.usbAC<Hpowersoftresetusb@fe1ffc00!st,st-ohci-300x8 >I icclk48)J.usbokayAC<Hpowersoftresetusb@fe203e00!st,st-ehci-300x8 > defaultK>I icclk48)J.usbAC<Hpowersoftresetusb@fe203c00!st,st-ohci-300x8 < >I icclk48)J.usbAC<Hpowersoftresetusb@fe303e00!st,st-ehci-300x80> defaultL>I icclk48)J.usbAC<Hpowersoftresetusb@fe303c00!st,st-ohci-300x80< >I icclk48)J.usbAC<Hpowersoftresetusb@fe343e00!st,st-ehci-300x84> defaultM>I icclk48)J.usbAC<Hpowersoftresetusb@fe343c00!st,st-ohci-300x84< >I icclk48)J.usbAC<Hpowersoftresetpwm@fed10000 !st,sti-pwm disabled88hdefaultNOPQpwmCpwm@fe510000 !st,sti-pwm disabled88Qhdefault RSTpwmCleds !gpio-ledsredFront Panel LEDS  YheartbeatgreenS ooffcache-controller!arm,pl310-cache8  } arm-pmu!arm,cortex-a9-pmup memory,memory8@chosen(console=ttyAS0,115200 clk_ignore_unused/soc/serial@fe531000 #address-cells#size-cellsmodelcompatibledevice_typereg#interrupt-cellsinterrupt-controllerlinux,phandleinterrupt-parentinterruptsclocksranges#clock-cellsclock-frequencyclock-output-namesclock-divclock-multgpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8gpio9gpio10gpio11gpio12gpio13gpio14gpio15gpio16gpio17gpio18gpio19gpio20gpio21gpio22gpio23gpio24gpio25gpio26gpio27gpio28gpio29ttyAS0ethernet1st,syscfgreg-namesinterrupt-namesgpio-controller#gpio-cellsst,bank-namest,retime-pin-maskirtxrxkeyin0keyin1keyin2keyin3keyout0keyout1keyout2keyout3sdascloc-detectpwr-enabletxd0txd1txd2txd3txertxentxclkcolmdiomdccrsmdintrxd0rxd1rxd2rxd3rxdvrx_errxclkphyclkclk125pwm-outoutput-enablespi-fsm-clkspi-fsm-csspi-fsm-mosispi-fsm-misospi-fsm-holspi-fsm-wpmmcclkdata0data1data2data3cmddata4data5data6data7pwrcdlednresetstatus#reset-cellsst,irq-devicest,fiq-devicepinctrl-namespinctrl-0clock-namesi2c-min-scl-pulse-width-usi2c-min-sda-pulse-width-ussnps,pblsnps,mixed-burstst,sysconresetsreset-namesphy-modemax-speedst,tx-retime-srcsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrx-modest,boot-device-regst,boot-device-spilabelbus-widthnon-removable#phy-cellsst,sata-genst,pcie-tx-pol-invphysphy-names#pwm-cellsst,pwm-num-changpioslinux,default-triggerdefault-statearm,data-latencyarm,tag-latencycache-unifiedcache-levelbootargslinux,stdout-path