Ð þí@(8=”(”=\,Cubietech Cubieboard4.2cubietech,a80-cubieboard4allwinner,sun9i-a80chosen=serial0:115200n8aliasesI/soc/serial@07000000memoryQmemory] cpuscpu@02arm,cortex-a7Qcpu]cpu@12arm,cortex-a7Qcpu]cpu@22arm,cortex-a7Qcpu]cpu@32arm,cortex-a7Qcpu]cpu@1002arm,cortex-a15Qcpu]cpu@1012arm,cortex-a15Qcpu]cpu@1022arm,cortex-a15Qcpu]cpu@1032arm,cortex-a15Qcpu]timer2arm,armv7-timer0a   ln6|clocks  osc24M_clk§ 2fixed-clockln6´osc24MÇÍosc32k_clk§ 2fixed-clockl€´osc32kclk@00a08000§Õ 2allwinner,sun9i-a80-usb-mod-clk] €â9´usb0_ahbusb_ohci0usb1_ahbusb_ohci1usb2_ahbusb_ohci2Ç Í clk@00a08004§Õ 2allwinner,sun9i-a80-usb-phy-clk] €âF´usb_phy0usb_hsic1_480Musb_phy1usb_hsic2_480Musb_phy2usb_hsic_12MÇÍclk@0600000c§2allwinner,sun9i-a80-pll4-clk] â´pll4ÇÍclk@0600002c§2allwinner,sun9i-a80-pll4-clk],â´pll12ÇÍclk@0600005c§2allwinner,sun9i-a80-gt-clk]\â´gtÇÍclk@06000060§2allwinner,sun9i-a80-ahb-clk]`â´ahb0ÇÍclk@06000064§2allwinner,sun9i-a80-ahb-clk]dâ´ahb1ÇÍclk@06000068§2allwinner,sun9i-a80-ahb-clk]hâ´ahb2Ç Í clk@06000070§2allwinner,sun9i-a80-apb0-clk]pâ´apb0Ç Í clk@06000074§2allwinner,sun9i-a80-apb1-clk]tâ´apb1Ç Í clk@06000078§2allwinner,sun9i-a80-gt-clk]xâ´cci400clk@06000410§2allwinner,sun9i-a80-mmc-clk]â´mmc0mmc0_outputmmc0_sampleÇÍclk@06000414§2allwinner,sun9i-a80-mmc-clk]â´mmc1mmc1_outputmmc1_sampleÇÍclk@06000418§2allwinner,sun9i-a80-mmc-clk]â´mmc2mmc2_outputmmc2_sampleÇÍclk@0600041c§2allwinner,sun9i-a80-mmc-clk]â´mmc3mmc3_outputmmc3_sampleÇÍclk@06000580§#2allwinner,sun9i-a80-ahb0-gates-clk]€â<é ’´ahb0_fdahb0_veahb0_gpuahb0_ssahb0_sdahb0_nand1ahb0_nand0ahb0_sdramahb0_mipi_hsiahb0_sataahb0_tsahb0_spi0ahb0_spi1ahb0_spi2ahb0_spi3ÇÍclk@06000584§#2allwinner,sun9i-a80-ahb1-gates-clk]„âéR´ahb1_usbotgahb1_usbhciahb1_gmacahb1_msgboxahb1_spinlockahb1_hstimerahb1_dmaÇÍclk@06000588§#2allwinner,sun9i-a80-ahb2-gates-clk]ˆâ  é N´ahb2_lcd0ahb2_lcd1ahb2_edpahb2_csiahb2_hdmiahb2_deahb2_mpahb2_mipi_dsiclk@06000590§#2allwinner,sun9i-a80-apb0-gates-clk]â $é \´apb0_spdifapb0_pioapb0_ac97apb0_i2s0apb0_i2s1apb0_lradcapb0_gpadcapb0_twdapb0_cirtxÇÍclk@06000594§#2allwinner,sun9i-a80-apb1-gates-clk]”â ,ét´apb1_i2c0apb1_i2c1apb1_i2c2apb1_i2c3apb1_i2c4apb1_uart0apb1_uart1apb1_uart2apb1_uart3apb1_uart4apb1_uart5ÇÍsoc 2simple-bus  usb@00a00000&2allwinner,sun9i-a80-ehcigeneric-ehci]  aHâ ÷ þ usb  disabledusb@00a00400&2allwinner,sun9i-a80-ohcigeneric-ohci]  aIâ  ÷ þ usb  disabledphy@00a008002allwinner,sun9i-a80-usb-phy] âphy÷ phy  disabled,Ç Í usb@00a01000&2allwinner,sun9i-a80-ehcigeneric-ehci]  aJâ ÷ þusb  disabledphy@00a018002allwinner,sun9i-a80-usb-phy] â hsic_480Mhsic_12Mphy÷  hsicphy  disabled,7hsicÇÍusb@00a02000&2allwinner,sun9i-a80-ehcigeneric-ehci]   aLâ ÷ þusb  disabledusb@00a02400&2allwinner,sun9i-a80-ohcigeneric-ohci] $ aMâ  ÷ þusb  disabledphy@00a028002allwinner,sun9i-a80-usb-phy] (â hsic_480Mhsic_12Mphy÷  hsicphy  disabled,ÇÍmmc@01c0f0002allwinner,sun5i-a13-mmc]Àð âahbmmcoutputsample÷ ahb a< okay@defaultNXdnwmmc@01c100002allwinner,sun5i-a13-mmc]Á âahbmmcoutputsample÷ ahb a=  disabledmmc@01c110002allwinner,sun5i-a13-mmc]Á âahbmmcoutputsample÷ ahb a> okay@defaultNXdƒmmc@01c120002allwinner,sun5i-a13-mmc]Á  âahbmmcoutputsample÷ ahb a?  disabledclk@01c13000#2allwinner,sun9i-a80-mmc-config-clk]Á0âahb÷ ahb§Õ0´mmc0_configmmc1_configmmc2_configmmc3_configÇÍinterrupt-controller@01c41000%2arm,cortex-a7-gicarm,cortex-a15-gic ]ÄÄ Ä@ Ä` ‘¦ a ÇÍreset@060005a0Õ 2allwinner,sun6i-a31-clock-reset] ÇÍreset@060005a4Õ 2allwinner,sun6i-a31-clock-reset]¤reset@060005a8Õ 2allwinner,sun6i-a31-clock-reset]¨reset@060005b0Õ 2allwinner,sun6i-a31-clock-reset]°reset@060005b4Õ 2allwinner,sun6i-a31-clock-reset]´ÇÍtimer@06000c002allwinner,sun4i-a10-timer]  Haâwatchdog@06000ca02allwinner,sun6i-a31-wdt]    apinctrl@060008002allwinner,sun9i-a80-pinctrl]<a xâ·‘¦ÇÇÍi2c3@0 ÓPG10PG11âi2c3õmmc0ÓPF0PF1PF2PF3PF4PF5âmmc0õÇÍmmc2_8bit.ÓPC6PC7PC8PC9PC10PC11PC12PC13PC14PC15âmmc2õÇÍuart0@0 ÓPH12PH13âuart0õÇ Í uart4@0ÓPG12PG13PG14PG15âuart4õahci_pwr_pin@0ÓPB8 âgpio_outõÇ!Í!usb0_vbus_pin@0ÓPB9 âgpio_outõÇ"Í"usb1_vbus_pin@0ÓPH6 âgpio_outõÇ#Í#usb2_vbus_pin@0ÓPH3 âgpio_outõÇ$Í$mmc0_cd_pin@0ÓPH18âgpio_inõÇÍserial@070000002snps,dw-apb-uart] aâ÷ okay@defaultN serial@070004002snps,dw-apb-uart] aâ÷  disabledserial@070008002snps,dw-apb-uart] aâ÷  disabledserial@07000c002snps,dw-apb-uart]  aâ÷  disabledserial@070010002snps,dw-apb-uart] aâ÷  disabledserial@070014002snps,dw-apb-uart] aâ÷  disabledi2c@070028002allwinner,sun6i-a31-i2c]( aâ÷  disabledi2c@07002c002allwinner,sun6i-a31-i2c], aâ÷  disabledi2c@070030002allwinner,sun6i-a31-i2c]0 aâ÷  disabledi2c@070034002allwinner,sun6i-a31-i2c]4 a â÷  disabledi2c@070038002allwinner,sun6i-a31-i2c]8 a â÷  disabledwatchdog@080010002allwinner,sun6i-a31-wdt]  a$serial@080028002snps,dw-apb-uart]( a&â  disabledahci-5v2regulator-fixed@defaultN!+ahci-5v:LK@RLK@j|  disabledusb0-vbus2regulator-fixed@defaultN" +usb0-vbus:LK@RLK@|   disabledusb1-vbus2regulator-fixed@defaultN# +usb1-vbus:LK@RLK@j|  disabledusb2-vbus2regulator-fixed@defaultN$ +usb2-vbus:LK@RLK@j|  disabledvcc3v02regulator-fixed+vcc3v0:-ÆÀR-ÆÀÇÍvcc3v32regulator-fixed+vcc3v3:2Z R2Z vcc5v02regulator-fixed+vcc5v0:LK@RLK@ #address-cells#size-cellsinterrupt-parentmodelcompatiblestdout-pathserial0device_typereginterruptsclock-frequencyarm,cpu-registers-not-fw-configuredranges#clock-cellsclock-output-nameslinux,phandle#reset-cellsclocksclock-indicesresetsphysphy-namesstatusclock-namesreset-names#phy-cellsphy_typepinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertednon-removableinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pullreg-shiftreg-io-widthregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpio