Ð þí#d8!H(! Sony NSZ-GS7,sony,nsz-gs7marvell,berlin2marvell,berlin aliases%,/soc@f7000000/apb@fc0000/serial@9000%4/soc@f7000000/apb@fc0000/serial@a000%S¶local-timer@ad0600arm,cortex-a9-twd-timero­  â s(ethernet@b90000marvell,pxa168-etho¹s âd vmiiŠíokayethernet-phy@0o¶cpu-ctrl@dd0000marvell,berlin-cpu-ctrloÝethernet@e50000marvell,pxa168-ethoås âd vmiiŠ ídisabledethernet-phy@0o¶apb@e80000 simple-bus  Ïè¾gpio@400snps,dw-apb-gpioo gpio-port@0snps,dw-apb-gpio-port•¥±o>Sâgpio@800snps,dw-apb-gpioo gpio-port@1snps,dw-apb-gpio-port•¥±o>Sâgpio@c00snps,dw-apb-gpioo  gpio-port@2snps,dw-apb-gpio-port•¥±o>Sâgpio@1000snps,dw-apb-gpioo gpio-port@3snps,dw-apb-gpio-port•¥±o>Sâtimer@2c00snps,dw-apb-timero,âsÖtimeríokaytimer@2c14snps,dw-apb-timero,â sÖtimeríokaytimer@2c28snps,dw-apb-timero,(â sÖtimer ídisabledtimer@2c3csnps,dw-apb-timero,<â sÖtimer ídisabledtimer@2c50snps,dw-apb-timero,Pâ sÖtimer ídisabledtimer@2c64snps,dw-apb-timero,dâ sÖtimer ídisabledtimer@2c78snps,dw-apb-timero,xâsÖtimer ídisabledtimer@2c8csnps,dw-apb-timero,ŒâsÖtimer ídisabledinterrupt-controller@3000snps,dw-apb-ictlo0 >S¾ â¶sata@e90000"marvell,berlin2-ahcigeneric-ahcioé âs íokaysata-port@0o¸íokaysata-port@1o¸ ídisabledphy@e900a0marvell,berlin2-sata-phyoé s ½íokay¶sata-phy@0osata-phy@1ochip-control@ea0000simple-mfdsysconoêclockmarvell,berlin2-clk™s Örefclk¶pin-controllermarvell,berlin2-soc-pinctrlemmc-pmuxÈG26Ïemmc¶resetmarvell,berlin2-resetØpwm@f20000marvell,berlin-pwmoò@såapb@fc0000 simple-bus  Ïü¾ watchdog@1000 snps,dw-wdtos âwatchdog@2000 snps,dw-wdto s âwatchdog@3000 snps,dw-wdto0s âgpio@5000snps,dw-apb-gpiooP gpio-port@5snps,dw-apb-gpio-port•¥±ogpio@c000snps,dw-apb-gpiooÀ gpio-port@4snps,dw-apb-gpio-port•¥±o>Sâ serial@9000snps,dw-apb-uartoðúâs ô þdefaultíokayserial@a000snps,dw-apb-uarto ðúâ s ô þdefault ídisabledserial@b000snps,dw-apb-uarto°ðúâ s ô þdefault ídisabledsystem-controller@d000simple-mfdsysconoÐpin-controllermarvell,berlin2-system-pinctrluart0-pmuxÈGSM4Ïuart0¶ uart1-pmuxÈGSM5Ïuart1¶ uart2-pmuxÈGSM3Ïuart2¶ interrupt-controller@e000snps,dw-apb-ictloà>S¾ ⶠchosen earlyprintkserial0:115200n8memory@0Rmemoryo@ modelcompatible#address-cells#size-cellsserial0serial1serial2enable-methoddevice_typenext-level-cacheregclocksclock-latencyoperating-points#clock-cellsclock-frequencyphandleinterrupt-parentrangesclock-namesinterruptsstatuspinctrl-0pinctrl-namesnon-removablebus-widthcache-unifiedcache-levelinterrupt-controller#interrupt-cellslocal-mac-addressphy-connection-typephy-handlegpio-controller#gpio-cellsngpiosphys#phy-cellsgroupsfunction#reset-cells#pwm-cellsreg-shiftreg-io-widthbootargsstdout-path