K8I((H#Hisilicon Hi4511 Development Board!hisilicon,hi3620-hi4511aliases,/amba-bus/serial@b000004/amba-bus/serial@b01000>??@@A E Lapb_pclkgpio@816000!arm,pl061arm,primecell` PBCDEFGHI E Lapb_pclkgpio@817000!arm,pl061arm,primecellp QJKLMNOPQ E Lapb_pclk!gpio@818000!arm,pl061arm,primecell RRSSTTUVW E Lapb_pclkgpio@819000!arm,pl061arm,primecell S@WWXX E Lapb_pclkgpio@81a000!arm,pl061arm,primecell T`YYZZ[\ E Lapb_pclkgpio@81b000!arm,pl061arm,primecell U ^` E Lapb_pclkpinmux@803000!pinctrl-single0    +,1^`_defaultmgpio-rangeboard_pmx_pins@uart0_pmx_func@uart0_pmx_idle@uart1_pmx_func@uart1_pmx_idle@ uart2_pmx_func@ uart2_pmx_idle@uart3_pmx_func@`duart3_pmx_idle@`duart4_pmx_func@hlpuart4_pmx_idle@hlpi2c0_pmx_func@i2c0_pmx_idle@i2c1_pmx_func@i2c1_pmx_idle@i2c2_pmx_func@hli2c2_pmx_idle@hli2c3_pmx_func@PTi2c3_pmx_idle@PTspi0_pmx_func(@spi0_pmx_idle(@spi1_pmx_func@spi1_pmx_idle@kpc_pmx_func0@,04 kpc_pmx_idle0@,04 gpio_key_func@ 0emmc_pmx_func(@0$(,emmc_pmx_idle(@0$(,sd_pmx_func@sd_pmx_idle@nand_pmx_funcH@  $(,nand_pmx_idleH@  $(,sdio_pmx_func@sdio_pmx_idle@audio_out_pmx_func@pinmux@803800!pinconf-single8 _defaultm board_pu_pins @ Tqboard_pd_pins@8PTTqboard_pd_ps_pins@Tq0board_np_pins@LTqboard_ps_pins@0uart0_cfg_func@ Tquart0_cfg_idle@ Tquart1_cfg_func @Tq uart1_cfg_idle @Tq uart2_cfg_func @ $(,Tq uart2_cfg_idle @ $(,Tquart3_cfg_func @Tquart3_cfg_idle @Tquart4_cfg_func @Tqi2c0_cfg_func@|Tq0i2c1_cfg_func@Tq0i2c2_cfg_func@Tq0i2c3_cfg_func@Tq0spi0_cfg_func1@Tq0spi0_cfg_func2 @Tq0spi1_cfg_func1@Tq0spi1_cfg_func2@Tq0kpc_cfg_func0@PTX048Tqemmc_cfg_funch@XdhTq0sd_cfg_func1@Tq0sd_cfg_func2 @Tqpnand_cfg_func1@<@lptx|Tq0nand_cfg_func2P@DHLPTX\`dhTq0sdio_cfg_func0@Tq0audio_out_cfg_func@Tq chosenroot=/dev/ram0serial0:115200n8memory@40000000memory@ gpio-keys !gpio-keyscallcall ! #address-cells#size-cellsmodelcompatibleserial0serial1serial2serial3serial4#clock-cellsclock-frequencyclock-output-namesenable-methoddevice_typeregnext-level-cacheinterrupt-parentrangesinterruptscache-unifiedcache-levelphandle#interrupt-cellsinterrupt-controllersmp-offsetresume-offsetreboot-offsetclocksclock-namesstatuspinctrl-namespinctrl-0pinctrl-1gpio-controller#gpio-cellsgpio-ranges#pinctrl-cells#gpio-range-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,drive-strengthbootargsstdout-pathlabelgpioslinux,code