885(5|renesas,marzenrenesas,r8a7779 +7marzencpus+cpu@0=cpuarm,cortex-a9IM;]cpu@1=cpuarm,cortex-a9IM;]dcpu@2=cpuarm,cortex-a9IM;]dcpu@3=cpuarm,cortex-a9IM;]daliasesr/spi@fffc7000w/spi@fffc8000|/spi@fffc6000/serial@ffe42000/serial@ffe44000interrupt-controller@f0001000arm,cortex-a9-gicItimer@f0000200arm,cortex-a9-global-timerI  ]timer@f0000600arm,cortex-a9-twd-timerI   ]gpio@ffc40000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioI,  gpio@ffc41000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioI,  gpio@ffc42000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioI , @ gpio@ffc43000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioI0, ` gpio@ffc44000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioI@,  gpio@ffc45000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioIP,  gpio@ffc46000,renesas,gpio-r8a7779renesas,rcar-gen1-gpioI`,  interrupt-controller@fe78001c0renesas,intc-irqpin-r8a7779renesas,intc-irqpinokay0Ixxx$xDxdx0i2c@ffc70000+*renesas,i2c-r8a7779renesas,rcar-gen1-i2cI O]d  disabledi2c@ffc71000+*renesas,i2c-r8a7779renesas,rcar-gen1-i2cI R]d  disabledi2c@ffc72000+*renesas,i2c-r8a7779renesas,rcar-gen1-i2cI  P]d  disabledi2c@ffc73000+*renesas,i2c-r8a7779renesas,rcar-gen1-i2cI0 Q]d  disabledserial@ffe400009renesas,scif-r8a7779renesas,rcar-gen1-scifrenesas,scifI X](fckbrg_intscif_clkd  disabledserial@ffe410009renesas,scif-r8a7779renesas,rcar-gen1-scifrenesas,scifI Y](fckbrg_intscif_clkd  disabledserial@ffe420009renesas,scif-r8a7779renesas,rcar-gen1-scifrenesas,scifI  Z](fckbrg_intscif_clkd okay4>defaultserial@ffe430009renesas,scif-r8a7779renesas,rcar-gen1-scifrenesas,scifI0 [](fckbrg_intscif_clkd  disabledserial@ffe440009renesas,scif-r8a7779renesas,rcar-gen1-scifrenesas,scifI@ \](fckbrg_intscif_clkd okay4>defaultserial@ffe450009renesas,scif-r8a7779renesas,rcar-gen1-scifrenesas,scifIP ]](fckbrg_intscif_clkd  disabledserial@ffe48000<renesas,hscif-r8a7779renesas,rcar-gen1-hscifrenesas,hscifI` ^](fckbrg_intscif_clkd  disabledserial@ffe49000<renesas,hscif-r8a7779renesas,rcar-gen1-hscifrenesas,hscifI` _](fckbrg_intscif_clkd  disabledpinctrl@fffc0000renesas,pfc-r8a7779I<4 >defaultdudu0/Ldu0_rgb888du0_sync_1du0_clk_out_0du0_clk_inSdu0du1"Ldu1_rgb666du1_sync_1du1_clk_outSdu1scif_clk Lscif_clk_b Sscif_clk ethernetintc Lintc_irq1_bSintclbsc Llbsc_ex_cs0Slbscscif2 Lscif2_data_cSscif2scif4 Lscif4_dataSscif4sd0 Lsdhi0_data4sdhi0_ctrlsdhi0_cdSsdhi0 hspi0Lhspi0Shspi0thermal@ffc48000-renesas,thermal-r8a7779renesas,rcar-thermalIĀ8timer@ffd80000 renesas,tmu-r8a7779renesas,tmuI0$ !"](fckd \okaytimer@ffd81000 renesas,tmu-r8a7779renesas,tmuI0$$%&](fckd \ disabledtimer@ffd82000 renesas,tmu-r8a7779renesas,tmuI 0$()*](fckd \ disabledsata@fc600000renesas,sata-r8a7779I`  d] d okaymmc@ffe4c000,renesas,sdhi-r8a7779renesas,rcar-gen1-sdhiI h] d okay4 >defaultn zmmc@ffe4d000,renesas,sdhi-r8a7779renesas,rcar-gen1-sdhiI i] d  disabledmmc@ffe4e000,renesas,sdhi-r8a7779renesas,rcar-gen1-sdhiI k] d  disabledmmc@ffe4f000,renesas,sdhi-r8a7779renesas,rcar-gen1-sdhiI j] d  disabledspi@fffc7000"renesas,hspi-r8a7779renesas,hspiIp I+]d okay4>defaultspi@fffc8000"renesas,hspi-r8a7779renesas,hspiI J+]d  disabledspi@fffc6000"renesas,hspi-r8a7779renesas,hspiI` K+]d  disableddisplay@fff80000renesas,du-r8a7779I  ] (du.0dclkin.0d okay4>defaultports+port@0Iendpointport@1Iendpointclocks+extal fixed-clockMPscif fixed-clockMclocks@ffc80000renesas,r8a7779-cpg-clocksI0]pllazzsss1pboutifixed-factor-clock]s3fixed-factor-clock]s4fixed-factor-clock]gfixed-factor-clock]clocks@ffc800304renesas,r8a7779-mstp-clocksrenesas,cpg-mstp-clocksI0]@Zhspitmu2tmu1tmu0hscif1hscif0scif5scif4scif3scif2scif1scif0i2c3i2c2i2c1i2c0clocks@ffc800344renesas,r8a7779-mstp-clocksrenesas,cpg-mstp-clocksI4DP]( 2usb01usb2duvin2vin1vin0ethersatapcievin3 clocks@ffc8003c4renesas,r8a7779-mstp-clocksrenesas,cpg-mstp-clocksI<]"sdhi3sdhi2sdhi1sdhi0mmc1mmc0 chipid@ff000044 renesas,prrIDreset-controller@ffcc0000renesas,r8a7779-reset-wdtIHsystem-controller@ffd85000renesas,r8a7779-syscIPchosen'ignore_loglevel rw root=/dev/nfs ip=onserial0:115200n8memory@60000000=memoryI`@regulator-3v3regulator-fixed  fixed-3.3V2Z42ZL^ regulator-vccq-sdhi0regulator-gpio  SDHI0 VccQw@42Z rx~2Zw@ethernet@18000000smsc,lan9220smsc,lan9115I4>defaultmii   leds gpio-ledsled2 rled3 rled4 rvga-encoder adi,adv7123ports+port@0Iendpointport@1Iendpointvgavga-connectorportendpointlvds-encoderthine,thc63lvdm83dports+port@0Iendpointport@1Iendpointx3-clock fixed-clockM@ compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregclock-frequencyclockspower-domainsspi0spi1spi2serial0serial1#interrupt-cellsinterrupt-controllerphandleinterrupts#gpio-cellsgpio-controllergpio-rangesstatussense-bitfield-widthi2c-scl-internal-delay-nsclock-namespinctrl-0pinctrl-namesgroupsfunction#renesas,channelsvmmc-supplyvqmmc-supplybus-widthremote-endpoint#clock-cellsclock-output-names#power-domain-cellsclock-divclock-multclock-indicesbootargsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-ongpiosgpios-statesphy-modesmsc,irq-push-pullreg-io-widthvddvario-supplyvdd33a-supply