28(hrenesas,goserenesas,r8a7793 &Gosealiases,/soc/i2c@e65080001/soc/i2c@e65180006/soc/i2c@e6530000;/soc/i2c@e6540000@/soc/i2c@e6520000E/soc/i2c@e6528000J/soc/i2c@e60b0000O/soc/i2c@e6500000T/soc/i2c@e6510000Y/soc/spi@e6b10000^/soc/serial@e6e60000f/soc/serial@e6e68000n/i2c-9s/i2c-10y/i2c-11/i2c-12/soc/mmc@ee100000/soc/mmc@ee140000/soc/mmc@ee160000audio_clk_a fixed-clockaudio_clk_b fixed-clockaudio_clk_c fixed-clockcan fixed-clockcpus cpu@0cpuarm,cortex-a15Yh/  renesas,apmu0 `B@B@*B@NB@ qB@B@.cpu@1cpuarm,cortex-a15Yh/  renesas,apmu0 `B@B@*B@NB@ qB@B@cache-controller-0cache :Hextal fixed-clock1- pmuarm,cortex-a15-pmu THIhscif fixed-clocksoc simple-bus{ watchdog@e6020000*renesas,r8a7793-wdtrenesas,rcar-gen2-wdt   okay<gpio@e6050000,renesas,gpio-r8a7793renesas,rcar-gen2-gpioP    gpio@e6051000,renesas,gpio-r8a7793renesas,rcar-gen2-gpioP    gpio@e6052000,renesas,gpio-r8a7793renesas,rcar-gen2-gpio P @   Bgpio@e6053000,renesas,gpio-r8a7793renesas,rcar-gen2-gpio0P `   Ngpio@e6054000,renesas,gpio-r8a7793renesas,rcar-gen2-gpio@P    Qgpio@e6055000,renesas,gpio-r8a7793renesas,rcar-gen2-gpioPP     8gpio@e6055400,renesas,gpio-r8a7793renesas,rcar-gen2-gpioTP     ,gpio@e6055800,renesas,gpio-r8a7793renesas,rcar-gen2-gpioXP    Apinctrl@e6060000renesas,pfc-r8a7793P defaulti2c2i2c2%i2c2 i2c4i2c4_c%i2c4 du'du_rgb888du_syncdu_dispdu_clk_out_0%du;scif0 scif0_data_d%scif0scif1 scif1_data_d%scif1scif_clk scif_clk %scif_clk ethereth_linketh_mdioeth_rmii%eth5phy1 intc_irq0%intc6pmicirq intc_irq2%intcsd0sdhi0_data4sdhi0_ctrl%sdhi0. (sd0_uhssdhi0_data4sdhi0_ctrl%sdhi0.)sd1sdhi1_data4sdhi1_ctrl%sdhi1. -sd1_uhssdhi1_data4sdhi1_ctrl%sdhi1..sd2sdhi2_data4sdhi2_ctrl%sdhi2. 1sd2_uhssdhi2_data4sdhi2_ctrl%sdhi2.2qspiqspi_ctrlqspi_data4%qspisound!ssi0129_ctrlssi0_datassi1_data%ssisound_clk audio_clk_a %audio_clkkeyboard;GP_5_0GP_5_1GP_5_2GP_5_3@@vin0+vin0_data24vin0_syncvin0_clkenbvin0_clk%vin0vin1vin1_data8vin1_clk%vin1clock-controller@e6150000renesas,r8a7793-cpg-mssr Mextalusb_extalYmapmu@e6152000"renesas,r8a7793-apmurenesas,apmu zreset-controller@e6160000renesas,r8a7793-rstsystem-controller@e6180000renesas,r8a7793-syscYinterrupt-controller@e61c0000"renesas,irqc-r8a7793renesas,irqcx    thermal@e61f0000Grenesas,thermal-r8a7793renesas,rcar-gen2-thermalrenesas,rcar-thermal 8 E    ?iommu@e6280000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsa( disablediommu@e6290000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsa)  disablediommu@e6740000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsat disablediommu@ec680000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsah  disablediommu@fe951000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsa disablediommu@ffc80000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsa 3 disablediommu@e62a0000)renesas,ipmmu-r8a7793renesas,ipmmu-vmsa* disabledsram@e63a0000 mmio-sram:  : sram@e63c0000 mmio-sram< <smp-sram@0renesas,smp-srami2c@e6508000 *renesas,i2c-r8a7793renesas,rcar-gen2-i2cP@    disabledi2c@e6518000 *renesas,i2c-r8a7793renesas,rcar-gen2-i2cQ@     disabledi2c@e6530000 *renesas,i2c-r8a7793renesas,rcar-gen2-i2cS@   okay  i2c-hdmiJi2c@e6540000 *renesas,i2c-r8a7793renesas,rcar-gen2-i2cT@ "   disabledi2c@e6520000 *renesas,i2c-r8a7793renesas,rcar-gen2-i2cR@    disabled  i2c-exio4Ti2c@e6528000 *renesas,i2c-r8a7793renesas,rcar-gen2-i2cR@   n disabledi2c@e60b0000 >renesas,iic-r8a7793renesas,rcar-gen2-iicrenesas,rmobile-iic %   wxwx txrxtxrx okaydefaultpmic@58 dlg,da9063X{rtcdlg,da9063-rtcwdtdlg,da9063-watchdogregulator@68 dlg,da9210h{B@B@ i2c@e6500000 >renesas,iic-r8a7793renesas,rcar-gen2-iicrenesas,rmobile-iicP%  > abab txrxtxrx > disabledi2c@e6510000 >renesas,iic-r8a7793renesas,rcar-gen2-iicrenesas,rmobile-iicQ%  C efef txrxtxrx C disableddma-controller@e6700000'renesas,dmac-r8a7793renesas,rcar-dmacpG!errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14 Mfck 1<dma-controller@e6720000'renesas,dmac-r8a7793renesas,rcar-dmacr456789:;<=>G!errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14 Mfck 1<spi@e6b10000"renesas,qspi-r8a7793renesas,qspi,    txrxtxrx I okaydefaultflash@0!spansion,s25fl512sjedec,spi-norPÀbspartitionsfixed-partitions partition@0loaderpartition@40000user@partition@440000flashDserial@e6c40000<renesas,scifa-r8a7793renesas,rcar-gen2-scifarenesas,scifa@  Mfck !"!" txrxtxrx  disabledserial@e6c50000<renesas,scifa-r8a7793renesas,rcar-gen2-scifarenesas,scifa@  Mfck %&%& txrxtxrx  disabledserial@e6c60000<renesas,scifa-r8a7793renesas,rcar-gen2-scifarenesas,scifa@  Mfck '('( txrxtxrx  disabledserial@e6c70000<renesas,scifa-r8a7793renesas,rcar-gen2-scifarenesas,scifa@  RMfck  txrxtxrx R disabledserial@e6c78000<renesas,scifa-r8a7793renesas,rcar-gen2-scifarenesas,scifaǀ@  SMfck    txrxtxrx S disabledserial@e6c80000<renesas,scifa-r8a7793renesas,rcar-gen2-scifarenesas,scifa@  TMfck #$#$ txrxtxrx T disabledserial@e6c20000<renesas,scifb-r8a7793renesas,rcar-gen2-scifbrenesas,scifb  Mfck =>=> txrxtxrx  disabledserial@e6c30000<renesas,scifb-r8a7793renesas,rcar-gen2-scifbrenesas,scifb  Mfck  txrxtxrx  disabledserial@e6ce0000<renesas,scifb-r8a7793renesas,rcar-gen2-scifbrenesas,scifb  Mfck  txrxtxrx  disabledserial@e6e600009renesas,scif-r8a7793renesas,rcar-gen2-scifrenesas,scif@ Mfckbrg_intscif_clk )*)* txrxtxrx okaydefaultserial@e6e680009renesas,scif-r8a7793renesas,rcar-gen2-scifrenesas,scif@ Mfckbrg_intscif_clk -.-. txrxtxrx okaydefaultserial@e6e580009renesas,scif-r8a7793renesas,rcar-gen2-scifrenesas,scif@ Mfckbrg_intscif_clk +,+, txrxtxrx  disabledserial@e6ea80009renesas,scif-r8a7793renesas,rcar-gen2-scifrenesas,scif@ Mfckbrg_intscif_clk /0/0 txrxtxrx  disabledserial@e6ee00009renesas,scif-r8a7793renesas,rcar-gen2-scifrenesas,scif@ Mfckbrg_intscif_clk  txrxtxrx  disabledserial@e6ee80009renesas,scif-r8a7793renesas,rcar-gen2-scifrenesas,scif@ Mfckbrg_intscif_clk  txrxtxrx  disabledserial@e62c0000<renesas,hscif-r8a7793renesas,rcar-gen2-hscifrenesas,hscif,` Mfckbrg_intscif_clk 9:9: txrxtxrx  disabledserial@e62c8000<renesas,hscif-r8a7793renesas,rcar-gen2-hscifrenesas,hscif,` Mfckbrg_intscif_clk MNMN txrxtxrx  disabledserial@e62d0000<renesas,hscif-r8a7793renesas,rcar-gen2-hscifrenesas,hscif-` Mfckbrg_intscif_clk ;<;< txrxtxrx  disabledcan@e6e80000*renesas,can-r8a7793renesas,rcar-gen2-can Mclkp1clkp2can_clk  disabledcan@e6e88000*renesas,can-r8a7793renesas,rcar-gen2-can Mclkp1clkp2can_clk  disabledvideo@e6ef0000*renesas,vin-r8a7793renesas,rcar-gen2-vin  + +okaydefaultportendpointiSvideo@e6ef1000*renesas,vin-r8a7793renesas,rcar-gen2-vin  * *okaydefaultportendpointiMvideo@e6ef2000*renesas,vin-r8a7793renesas,rcar-gen2-vin   ) ) disabledsound@ec5000003renesas,rcar_sound-r8a7793renesas,rcar_sound-gen2PPZTTtscuadgssiussiaudmapp, Mssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0src.9src.8src.7src.6src.5src.4src.3src.2src.1src.0dvc.0dvc.1clk_aclk_bclk_cclk_i XDssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0okaydefault Drcar_sound,dvcdvc-0 tx$dvc-1 tx'rcar_sound,srcsrc-0 `! rxtxsrc-1 a! rxtxsrc-2 b! rxtx#src-3 c! rxtx&src-4 d! rxtxsrc-5 e! rxtxsrc-6 f! rxtxsrc-7 g! rxtxsrc-8 h! rxtxsrc-9 i! rxtxrcar_sound,ssissi-0 r ! ! rxtxrxutxu"ssi-1 s ! !I Jrxtxrxutxu%ssi-2 t ! !c drxtxrxutxussi-3 u ! !o prxtxrxutxussi-4 v ! !q rrxtxrxutxussi-5 w ! !s trxtxrxutxussi-6 x ! !u vrxtxrxutxussi-7 y ! !y zrxtxrxutxussi-8 z ! !{ |rxtxrxutxussi-9 { ! !} ~rxtxrxutxurcar_sound,daidai0 )"#$ 2%&'dma-controller@ec700000'renesas,dmac-r8a7793renesas,rcar-dmacpZ@ABCDEFGHIJKL=!errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12 Mfck 1< !dma-controller@ec720000'renesas,dmac-r8a7793renesas,rcar-dmacr[MNOPQRSTUVWXY=!errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12 Mfck 1<  mmc@ee100000,renesas,sdhi-r8a7793renesas,rcar-gen2-sdhi(  :  txrxtxrxT v :okay(:)defaultstate_uhsD*P+ ], f,o|mmc@ee140000,renesas,sdhi-r8a7793renesas,rcar-gen2-sdhi  8  txrxtxrxTϻ` 8okay-:.defaultstate_uhsD/P0 ], f,ommc@ee160000,renesas,sdhi-r8a7793renesas,rcar-gen2-sdhi  7  txrxtxrxTϻ` 7okay1:2defaultstate_uhsD3P4 ],ommc@ee200000'renesas,mmcif-r8a7793renesas,sh-mmcif   ;  txrxtxrx ; disabledTϻ`ethernet@ee700000.renesas,ether-r8a7793renesas,rcar-gen2-etherp  - -rmii okay56default7ethernet-phy@1{ 87interrupt-controller@f1001000 arm,gic-400 @ @ `    Mclk fdp1@fe940000 renesas,fdp1$  w wfdp1@fe944000 renesas,fdp1@$  v vdisplay@feb00000renesas,du-r8a7793  9:Mdu.0du.1dclkin.0dclkin.1du.0okay;defaultports port@0endpoint<Oport@1endpoint=>lvds@feb90000renesas,r8a7793-lvds   disabledports port@0endpoint>=port@1endpointchipid@ff000044 renesas,prrDtimer@ffca0000,renesas,r8a7793-cmt0renesas,rcar-gen2-cmt0 |Mfck |okaytimer@e6130000,renesas,r8a7793-cmt1renesas,rcar-gen2-cmt1`xyz{|}~ IMfck I disabledthermal-zonescpu-thermal ?tripscpu-crits% criticalcooling-mapstimerarm,armv7-timer@T   usb_extal fixed-clockl chosen'0ignore_loglevel rw root=/dev/nfs ip=on9serial0:115200n8memory@40000000memory@@keyboard gpio-keys@defaultkey-1 `8ESW2-1P^key-2 `8ESW2-2P^key-3 `8ESW2-3P^key-4 `8ESW2-4P^key-a `AESW30P^key-b `AE0SW31P^key-c `AE.SW32P^key-d `AE SW33P^key-e `AESW34P^key-f `AE!SW35P^key-g `AE"SW36P^leds gpio-ledsled6 `BLED6led7 `BLED7led8 `BLED8regulator-vcc-sdhi0regulator-fixed pSDHI0 Vcc2Z2Z A*regulator-vccq-sdhi0regulator-gpio pSDHI0 VccQw@2Z `B 2Zw@+regulator-vcc-sdhi1regulator-fixed pSDHI1 Vcc2Z2Z A/regulator-vccq-sdhi1regulator-gpio pSDHI1 VccQw@2Z `B 2Zw@0regulator-vcc-sdhi2regulator-fixed pSDHI2 Vcc2Z2Z A3regulator-vccq-sdhi2regulator-gpio pSDHI2 VccQw@2Z `B2Zw@4audio_clock fixed-clockDFsoundsimple-audio-cardleft_jCCsimple-audio-card,cpuDsimple-audio-card,codecEFChdmi-inhdmi-connectoraportendpointGRhdmi-outhdmi-connectoraportendpointHPcomposite-incomposite-video-connectorportendpointILx2-clock fixed-clockl:x13-clock fixed-clock 9i2c-9  i2c-gpio disabled B BKi2c-10  i2c-gpio disabled A  AUi2c-11i2c-demux-pinctrl.JK 9i2c-hdmi codec@12asahi-kasei,ak4643 Ecomposite-in@20adi,adv7180cp ports port@0endpointLIport@3endpointiMhdmi@39 adi,adv7511w9{NFVrgbk1xports port@0endpointO<port@1endpointPHhdmi-in@4c adi,adv7612L{Q{ports port@0endpointRGport@2endpointSeeprom@50renesas,r1ex24002atmel,24c02Pi2c-12i2c-demux-pinctrl.TU 9i2c-exio4  compatible#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8spi0serial0serial1i2c9i2c10i2c11i2c12mmc0mmc1mmc2#clock-cellsclock-frequencyphandledevice_typeregclockspower-domainsenable-methodvoltage-toleranceclock-latencyoperating-pointsnext-level-cachecpu0-supplycache-unifiedcache-levelinterrupts-extendedinterrupt-affinityinterrupt-parentrangesresetsstatustimeout-secinterrupts#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllerpinctrl-0pinctrl-namesgroupsfunctionpower-sourcepinsbias-pull-upclock-names#power-domain-cells#reset-cellscpus#thermal-sensor-cells#iommu-cellsi2c-scl-internal-delay-nsdmasdma-namesregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-oninterrupt-names#dma-cellsdma-channelsnum-csspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthspi-cpolspi-cpham25p,fast-readlabelread-onlyremote-endpointhsync-activevsync-activepclk-sampledata-activereg-namesreset-names#sound-dai-cellsshared-pinplaybackcapturepinctrl-1vmmc-supplyvqmmc-supplycd-gpioswp-gpiossd-uhs-sdr50sd-uhs-sdr104reg-io-widthphy-modephy-handlerenesas,ether-link-active-lowmicrel,led-modereset-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisbootargsstdout-pathlinux,codewakeup-sourcedebounce-intervalregulator-namegpioenable-active-highgpios-statessimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-daiscl-gpiossda-gpiosi2c-gpio,delay-usi2c-parenti2c-bus-nameadi,input-depthadi,input-colorspaceadi,input-clockdefault-inputpagesize