8(<p&renesas,rzn1d400-dbrenesas,r9a06g032 &RZN1D-DB Boardcpus cpu@0,cpuarm,cortex-a78<Tcpu@1,cpuarm,cortex-a78<TCrenesas,r9a06g032-smpQ@extjtagclkb fixed-clockoextmclkb fixed-clockobZextrgmiirefb fixed-clockoextrtcclkb fixed-clockosoc simple-bus system-controller@4000c000renesas,r9a06g032-sysctrl8@okayb<mclkrtcjtagrgmii_ref_extserial@40060000:renesas,r9a06g032-uartrenesas,rzn1-uartsnps,dw-apb-uart8@ <baudclkapb_pclkokayserial@40061000:renesas,r9a06g032-uartrenesas,rzn1-uartsnps,dw-apb-uart8@ <baudclkapb_pclk disabledserial@40062000:renesas,r9a06g032-uartrenesas,rzn1-uartsnps,dw-apb-uart8@  <baudclkapb_pclk disabledserial@50000000)renesas,r9a06g032-uartrenesas,rzn1-uart8P V<baudclkapb_pclk disabledserial@50001000)renesas,r9a06g032-uartrenesas,rzn1-uart8P W<baudclkapb_pclk disabledserial@50002000)renesas,r9a06g032-uartrenesas,rzn1-uart8P  X<baudclkapb_pclk disabledserial@50003000)renesas,r9a06g032-uartrenesas,rzn1-uart8P0 Y<baudclkapb_pclk disabledserial@50004000)renesas,r9a06g032-uartrenesas,rzn1-uart8P@ Z<baudclkapb_pclk disabledpinctrl@40067000/renesas,r9a06g032-pinctrlrenesas,rzn1-pinctrl8@pQ<Bbusokayinterrupt-controller@44101000arm,gic-400arm,cortex-a7-gic 8DD D@ D`   timer$arm,cortex-a7-timerarm,armv7-timer0   chosen(serial0:115200n8aliases4/soc/serial@40060000 compatible#address-cells#size-cellsmodeldevice_typeregclocksenable-methodcpu-release-addr#clock-cellsclock-frequencyphandleinterrupt-parentrangesstatusclock-namesinterruptsreg-shiftreg-io-widthinterrupt-controller#interrupt-cellsarm,cpu-registers-not-fw-configuredalways-onstdout-pathserial0